Junction-Intrinsic Dissipation in Hybrid Superconductor-Semiconductor Gatemon Qubits

By co-fabricating hybrid gatemon and standard SIS transmon qubits with identical circuit layouts, researchers demonstrate that gatemon relaxation times are limited by an order of magnitude more than theoretical predictions due to an unidentified, temperature-independent, junction-intrinsic dissipation mechanism rather than external circuit losses or quasiparticle effects.

The Gist

Imagine you are trying to build the world's most delicate, high-speed clock. This clock doesn't use gears or springs; it uses the laws of quantum physics to keep time. In the world of quantum computing, these "clocks" are called qubits.

For a long time, the best clocks have been made using a specific type of material sandwich called a SIS junction (Superconductor-Insulator-Superconductor). These clocks are incredibly accurate, ticking away for tens of thousands of microseconds before they lose their rhythm (a property called coherence).

However, scientists have been trying to build a new kind of clock using a different sandwich: Superconductor-Semiconductor-Superconductor (S–Sm–S). They call these "gatemons." The big selling point of gatemons is that they are like dimmer switches for electricity. You can tune their speed and behavior just by turning a knob (applying a voltage), whereas the old clocks are fixed once they are built. This tunability is a dream for engineers.

The Problem:
Despite their cool features, these new "gate" clocks have a major flaw. They stop working (lose coherence) way too fast. While the old clocks last for 20–70 microseconds, the new gate clocks barely last 2–10 microseconds. It's like buying a sports car that has a great engine but the tires fall off after 100 meters. Scientists knew that they were failing, but they didn't know why. Was it the tires? The road? Or was the engine itself defective?

The Experiment: A Side-by-Side Race
To find the culprit, the researchers at the Niels Bohr Institute decided to run a perfectly controlled race.

1. The Setup: They built two types of clocks on the exact same piece of silicon, using the exact same factory steps, the exact same wires, and the exact same protective coatings.
2. The Only Difference: The only thing they changed was the heart of the clock: the junction. One had the old "fixed" sandwich (SIS), and the other had the new "tunable" sandwich (S–Sm–S).
3. The Result: The old clocks ran for a long time. The new clocks stopped almost immediately.

Because everything else was identical, the researchers knew the problem had to be inside the new "tunable" sandwich itself.

Investigating the Crime Scene
The team acted like detectives, checking every possible reason why the new clock was failing:

• The "Leaky Roof" (Purcell Decay): Could the clock be leaking energy into the room? Check. They calculated this and found the roof was solid.
• The "Open Window" (Spontaneous Emission): Was the clock losing energy through the control wires? Check. They redesigned the wires to be super-shielded, like putting a soundproof wall around the clock. Still, the new clock failed.
• The "Dirty Floor" (Internal Loss): Was the material itself too dirty or rough? Check. They used the old clock as a reference to measure the cleanliness of the floor. It was clean.
• The "Heat" (Quasiparticles): Was the clock getting too hot, causing particles to jump around and break the rhythm? Check. They cooled the lab to near absolute zero and even warmed it up slightly. Both clocks reacted to the heat in the exact same way, meaning the "heat" wasn't the unique problem for the new clock.

The Verdict: The Engine is the Problem
After ruling out the roof, the windows, the floor, and the heat, the conclusion was clear: The engine itself is the problem.

The new "tunable" sandwich (the S–Sm–S junction) has a hidden flaw. It seems to have a "leak" that is built right into its design.

• Think of the old clock as a sealed water bottle. It holds water perfectly.
• The new clock is like a sponge. Even though you can squeeze it (tune it) to change its shape, the sponge naturally soaks up water (energy) and leaks it out, no matter how well you build the rest of the machine.

This "leak" is likely caused by tiny imperfections at the boundary where the metal meets the semiconductor. These imperfections create a "sub-gap" where energy can escape, a problem that doesn't exist in the older, simpler design.

Why This Matters
This paper is a huge step forward because it stops scientists from blaming the wrong things. Instead of trying to fix the wires or the cooling system, they now know they must fix the interface between the metal and the semiconductor.

The Takeaway
The researchers have proven that while "gate-tunable" qubits are a fantastic idea with huge potential, they currently have a built-in energy leak that makes them much less stable than traditional qubits. To make them useful for real quantum computers, engineers need to learn how to build a "sponge" that doesn't leak, or find a way to patch those microscopic holes.

They have provided the blueprint (the side-by-side comparison) that will help the whole field figure out how to fix the engine so these tunable clocks can finally keep time as well as the old ones.

Technical Summary

1. Problem Statement

Hybrid superconductor–semiconductor Josephson junctions (gatemons) offer a unique advantage over conventional superconducting qubits: gate tunability. By applying a gate voltage ($V_g$), the Josephson energy and qubit frequency can be tuned in situ, enabling access to rich mesoscopic physics and flexible circuit design.

However, a significant performance gap exists:

• State-of-the-art Transmons: Based on conventional Superconductor-Insulator-Superconductor (SIS) junctions, these achieve relaxation times ($T_1$) in the millisecond regime.
• Gatemons: Based on hybrid Superconductor-Semiconductor-Superconductor (S–Sm–S) junctions, these typically exhibit $T_1$ values in the few-microsecond range (best reported $\sim$30 $\mu$s, but often $<10$ $\mu$s).

The physical origin of this discrepancy has remained unclear. Previous studies struggled to distinguish whether the reduced coherence was due to:

1. Junction-specific mechanisms: Intrinsic properties of the S–Sm–S interface (e.g., subgap states, smaller induced superconducting gap).
2. Extrinsic factors: Differences in fabrication flows, substrate materials, dielectric interfaces, or control line engineering often used in disparate gatemon studies.

2. Methodology

To isolate the source of dissipation, the authors employed a co-fabrication strategy designed to eliminate extrinsic variables:

• Co-Integrated Platform: They fabricated both gatemon and transmon qubits on the same high-resistivity silicon chips.
• Identical Architecture: Both qubit types shared:
  • Identical circuit layouts (capacitor geometry, readout resonators).
  • Identical fabrication steps and material stacks (including the gate dielectric HfO$_x$).
  • Identical control line architectures (using an optimized "XYZ-style" line for both, where the gatemon line serves dual purposes for DC gating and microwave drive).
• The Only Variable: The intentional distinction was solely the Josephson junction element:
  • Transmon: Conventional SIS tunnel junction.
  • Gatemon: S–Sm–S hybrid junction using full-shell InAs/Al nanowires (with a segment of the Al shell etched to form the weak link).
• Experimental Approach:
  • Measured $T_1$ across multiple chips and material stacks (Al and NbTiN ground planes).
  • Constructed a loss budget using the transmons as on-chip references to quantify expected limits from Purcell decay, spontaneous emission, and internal dielectric loss.
  • Performed temperature-dependent $T_1$ measurements to analyze quasiparticle poisoning (QPP) dynamics and extract the superconducting gap ($\Delta$).

3. Key Contributions & Results

A. Systematic $T_1$ Discrepancy

• Transmon Performance: In this shared architecture, transmons routinely reached $T_1$ in the tens of microseconds (best: 71.6 $\mu$s).
• Gatemon Performance: Gatemons on the same chips saturated in the few-microsecond range (best: 9.1 $\mu$s).
• Conclusion: The performance gap is robust and independent of the ground plane material (Al vs. NbTiN), confirming that the issue is not the substrate or general fabrication flow.

B. Loss Budget Analysis

The authors constructed a theoretical loss budget for the gatemon by summing known dissipation channels:

1. Purcell Decay: Calculated to be $>300$ $\mu$s (negligible).
2. Spontaneous Emission (Control Line): Optimized gate-line geometry (ground shielding, narrow width) reduced this limit to $>30$ $\mu$s.
3. Internal Dielectric Loss: Using the co-fabricated transmon as a reference for the shared dielectric stack, the internal loss limit was estimated at tens of microseconds.

Result: The sum of these standard loss channels predicts a $T_1$ far exceeding the measured gatemon values. This proves that an additional, unidentified loss channel intrinsic to the S–Sm–S junction is responsible for the rapid relaxation.

C. Temperature Dependence & Quasiparticle Dynamics

To investigate if a smaller induced superconducting gap or different quasiparticle population caused the loss:

• Model: Both devices were fitted to a standard quasiparticle-activation model:
  $$T_1(T) = \left[ \Gamma_0 + \sqrt{\frac{8\Delta h f_q}{h}} \sqrt{\frac{2\pi k_B T}{\Delta}} e^{-\Delta/k_B T} \right]^{-1}$$
• Findings:
  • The extracted superconducting gaps ($\Delta$) for the S–Sm–S junction and the SIS junction were comparable (within fit uncertainties).
  • The temperature-dependent behavior followed the same activation model for both.
• Implication: The reduced gatemon coherence is not primarily caused by a significantly smaller induced gap or a qualitatively different thermal quasiparticle population.

D. Identification of Junction-Intrinsic Dissipation

The critical difference was found in the temperature-independent decay rate ($\Gamma_0$):

• Transmon: $\Gamma_0$ corresponds to $T_1 \approx 23$ $\mu$s.
• Gatemon: $\Gamma_0$ corresponds to $T_1 \approx 2\text{--}4$ $\mu$s.
• Interpretation: The gatemon suffers from a large, temperature-independent dissipation channel. The authors attribute this to junction-intrinsic mechanisms, likely:
  • Finite subgap conductance: Residual states within the superconducting gap due to imperfect S–Sm interfaces.
  • Quasiparticle tunneling: Enhanced tunneling rates mediated by these subgap states.
  • Excess nonequilibrium quasiparticles: Potentially orders of magnitude higher than in standard transmons.

4. Significance

• Isolation of Loss Mechanisms: This work provides the first controlled, apples-to-apples comparison that definitively isolates the Josephson junction as the primary source of decoherence in gatemons, ruling out extrinsic fabrication or circuit design flaws.
• Benchmarking Tool: The co-integrated gatemon-transmon platform serves as a blueprint for future benchmarking of hybrid qubits, allowing researchers to quantify junction-specific dissipation against a known high-coherence reference.
• Path Forward: The findings suggest that improving gatemon coherence requires junction engineering rather than just circuit optimization. Specific targets include:
  • Improving the quality of the superconductor–semiconductor interface.
  • Suppressing subgap conductance.
  • Implementing quasiparticle management strategies (e.g., using larger-gap superconductors).

In summary, while gatemons offer superior tunability, their current coherence is limited by intrinsic dissipation within the hybrid junction, specifically related to subgap states and interface quality, rather than the surrounding circuit environment.