FPGA-Accelerated Real-Time Diagnostics at DIII-D Using the SLAC Neural Network Library for ML Inference

This paper demonstrates the successful deployment of an FPGA-accelerated machine learning inference system using the SLAC Neural Network Library on the DIII-D tokamak to enable real-time, adaptive forecasting and suppression of disruptive Edge Localized Modes through hot-swappable neural network weights.

The Gist

Imagine a massive, super-hot star being held inside a giant magnetic bottle. This is a tokamak, a machine scientists use to try to create clean, limitless energy (fusion). The problem is that the "star" inside is temperamental. It likes to wiggle, surge, and occasionally throw a tantrum called an Edge Localized Mode (ELM). If these tantrums get too big, they can damage the machine or shut down the reaction.

To keep the machine running safely, scientists need a "guardian" that watches the star 24/7, predicts when it's about to throw a tantrum, and instantly hits a "calm down" button.

This paper describes how the team at the DIII-D fusion reactor built a super-fast, smart guardian using a special type of computer chip called an FPGA (Field-Programmable Gate Array) and a custom "brain" called the SLAC Neural Network Library (SNL).

Here is the breakdown of how it works, using simple analogies:

1. The Problem: The "Too Fast" Star

The machine produces a massive amount of data (like a high-speed camera taking a million pictures per second). Traditional computers (like the ones in your laptop or even powerful servers) are too slow to look at this data, figure out if a tantrum is coming, and send a command to stop it before it happens. By the time a normal computer finishes its math, the damage is already done.

2. The Solution: A "Specialized Brain" on a Chip

Instead of sending all that data to a slow computer, the team put a tiny, specialized brain directly onto the chip that receives the data.

• The Chip: They used an AMD/Xilinx KCU1500 FPGA. Think of this as a Lego board that can be instantly reshaped into any tool you need.
• The Brain: They trained a Neural Network (a type of AI) to recognize the specific "signs" of a coming tantrum. This brain was built using the SLAC Neural Network Library (SNL).

3. How It Works: The "Instant Translator"

Here is the flow of information, described as a relay race:

1. The Eyes (Sensors): The machine has sensors called Beam Emission Spectroscopy (BES) that watch the edge of the plasma. They see tiny ripples in the "star."
2. The Filter (Pre-processor): The FPGA receives a flood of data from 160 different sensors. It acts like a bouncer at a club, immediately filtering out the noise and only letting the 16 most important signals (the ones that actually predict tantrums) pass through.
3. The Decision (The AI): The AI looks at a tiny slice of time (48 microseconds—faster than a blink of an eye) and asks: "Is a tantrum coming?"
   • It classifies the current state (Is it calm? Is it getting wild?).
   • It calculates the likelihood of a tantrum.
4. The Action (The Controller): If the AI says, "Yes, a tantrum is likely," it instantly sends a signal to a separate controller. This controller fires magnets (Resonant Magnetic Perturbation coils) to gently push the plasma back into a safe shape, stopping the tantrum before it hurts the machine.

4. The Superpower: "Hot-Swapping" Brains

The coolest part of this system is its flexibility. Usually, if you want to change how a computer chip thinks, you have to take it apart, rebuild it, and start over. That takes days.

With the SNL library, the team can update the brain on the fly while the machine is running.

• The Analogy: Imagine a chef cooking a meal. Usually, to change the recipe, you have to rebuild the entire kitchen. With this system, the chef can just swap out the recipe card instantly without stopping the stove.
• In Practice: They can switch the AI from "predicting tantrums" to "checking if the plasma is stable" in a split second. They can also update the math (weights and biases) to learn from new data without ever turning off the machine.

5. The Results: Speed and Success

• Speed: The whole process—from seeing the data to making a decision—takes about 5.28 microseconds. That is incredibly fast; it's like the time it takes for a hummingbird to flap its wings once.
• Efficiency: The chip uses very little power and space, leaving room to add more complex tasks later.
• Real-World Test: They successfully used this system during live experiments to predict and suppress these disruptive events, proving it works in a real, high-stakes environment.

Summary

This paper shows that by putting a smart, adaptable AI directly onto the hardware that reads the sensors, scientists can react to a fusion reactor's problems almost instantly. It's like giving the reactor a reflex arc that bypasses the slow "thinking" part of the brain, allowing it to dodge danger in real-time. This is a crucial step toward building fusion reactors that can run safely and continuously in the future.

Technical Summary

1. Problem Statement

The DIII-D tokamak fusion reactor requires real-time control systems to maintain plasma stability and prevent disruptions, specifically Edge Localized Modes (ELMs). ELMs are explosive events that can damage reactor components and degrade confinement.

• The Challenge: Conventional plasma control systems rely on physics-informed models and empirical rules, which often lack the adaptability to handle unanticipated transitions near operational limits.
• The Bottleneck: While Machine Learning (ML) offers superior pattern recognition for tasks like disruption forecasting, deploying ML models on standard CPUs or GPUs introduces latency (often >1ms) that is incompatible with the sub-millisecond timing constraints of real-time tokamak control loops.
• The Need: A hardware-accelerated solution is required to process high-bandwidth diagnostic data (specifically Beam Emission Spectroscopy or BES) with microsecond-scale latency to enable active, adaptive control.

2. Methodology

The authors developed and deployed a hardware-accelerated ML inference system integrated directly into the DIII-D real-time Plasma Control System (PCS).

• Hardware Platform:
  • Device: AMD/Xilinx KCU1500 FPGA (hosting a Kintex-7 FPGA).
  • Location: Installed directly into the PCIe bus of the RTSTAB real-time signal acquisition node.
  • Connectivity: Uses high-speed InfiniBand to communicate with the main PCS host and actuator controllers.
• Software Framework:
  • SLAC Neural Network Library (SNL): A high-performance, FPGA-based inference framework.
  • Workflow: Models are trained remotely on HPC clusters using standard frameworks (PyTorch, TensorFlow, Keras) and compiled for FPGA deployment using the AMD Vitis toolchain (High-Level Synthesis).
  • Key Feature: SNL supports dynamic reloading of neural network weights and biases at runtime without requiring full hardware resynthesis (re-compilation of the bitstream).
• Data Pipeline:
  • Input: 160 diagnostic channels (ECE, CO2, BES) digitized at 1 MSps.
  • Pre-processing: An on-FPGA module extracts 16 specific BES channels. It constructs a temporal input window of 48 consecutive time slices (48µs) per channel.
  • Batching: The system processes 18 inference events (frames) simultaneously in a single cycle to maximize throughput.
• Neural Network Architecture:
  • Type: Multi-Layer Perceptron (MLP), fully connected feedforward topology.
  • Input: 768 features ($48 \text{ time slices} \times 16 \text{ channels}$).
  • Hidden Layers: Two layers with 50 neurons each, using ReLU activation.
  • Output: Configurable (1 to 4 neurons) depending on the task (Binary for ELM detection vs. 4-class for confinement regime).

3. Key Contributions

• Real-Time FPGA Deployment: Successfully integrated an ML inference engine directly into the DIII-D PCS, achieving 4.4–5.28 µs inference latency. This is approximately 10% of the data ingestion window, meeting strict real-time requirements.
• Dynamic Reconfigurability: Demonstrated the ability to hot-swap neural network weights and biases (and even change output layer configurations) during live experimental operation without stopping the system or resynthesizing the FPGA. This allows for:
  • Switching between tasks (e.g., ELM forecasting vs. confinement regime classification).
  • Continuous model refinement to adapt to "concept drift" (changing reactor conditions).
  • Masking unused input channels to accommodate sensor failures or aging.
• End-to-End Integration: Created a seamless pipeline from high-speed digitizers (1 MSps) through FPGA inference to the actuator control system (Resonant Magnetic Perturbation coils) for ELM suppression.
• Scalable Architecture: The design includes dedicated pre- and post-processing logic on the FPGA to handle data batching (18 frames/cycle) and parallel data transmission (8 features/clock cycle), ensuring optimal resource utilization.

4. Results

• Performance Benchmarks:
  • Latency: Achieved 5.28 µs for a 4-class classification model.
  • Resource Utilization: The design is highly efficient, utilizing only 5% of DSPs, 8% of Flip-Flops, 13% of LUTs, and 1% of BRAM on the Kintex-7 FPGA. This leaves significant headroom for more complex models or multi-tasking.
  • Timing: The design meets timing constraints at a 6ns clock frequency.
• Operational Validation:
  • The system was successfully used during closed-loop ELM suppression experiments.
  • Operators performed multiple weight/bias reload cycles between shots to adapt the model, proving the feasibility of runtime updates.
  • The inferred ELM likelihood ($P$) was successfully routed to a separate controller to adjust RMP coils, demonstrating a functional disruption-mitigation loop.

5. Significance

• Enabling Future Fusion Reactors: This work provides a critical template for reactor-relevant operation in future continuous-operation fusion devices (like ITER or DEMO), where autonomous, adaptive control is essential for safety and efficiency.
• Paradigm Shift in Control: It moves plasma control from static, physics-based rules to adaptive, data-driven strategies capable of handling nonlinear plasma dynamics in real-time.
• Generalizability: While demonstrated on DIII-D, the architecture (SNL + FPGA + RTSTAB) serves as a blueprint for general ML-based diagnostic processing in other high-energy physics and industrial control systems requiring ultra-low latency.
• Future Outlook: The authors identify that removing the CPU-based middleware layer (currently a bottleneck) to allow direct digitizer-to-FPGA streaming would further reduce latency and enable true continuous, event-triggered control, akin to intelligent trigger systems in high-energy physics.

In conclusion, this paper validates that reconfigurable, FPGA-accelerated ML is not only feasible but essential for the next generation of autonomous fusion plasma control, offering the speed and adaptability required to manage the complex, dynamic environment of a tokamak reactor.