Two-dimensional Si spin qubit arrays with multilevel interconnects

This paper demonstrates a scalable two-dimensional silicon spin qubit array utilizing industrial multilayer interconnects that maintains high gate fidelities and enables defect-tolerant reconfigurability through fully controllable nearest-neighbor exchange interactions.

The Gist

Imagine you are trying to build a massive city of tiny, super-fast computers called quantum computers. These computers use "qubits" (quantum bits) instead of regular bits. One of the most promising types of qubits is made from silicon, the same material used in your smartphone. They are great because they are stable and can be made using the same factories that build our current electronics.

However, there's a big problem: Scalability.

So far, scientists have been able to build these silicon qubits in neat, straight lines (like a single-file row of people). But to build a powerful quantum computer, you need a 2D grid (like a chessboard or a city block). The challenge is that in a 2D grid, you need to connect every single qubit to its neighbors without the wires getting tangled or the signals getting messy. If you try to wire them all on the same flat surface, it's like trying to build a skyscraper where every apartment has to share the same hallway—it just doesn't work when the building gets too big.

The Solution: The "Multi-Layer Highway System"

This paper from HRL Laboratories describes a breakthrough: they figured out how to build a 2D grid of silicon qubits using a "multi-layer highway system."

Here is the analogy:

• The Qubits: Think of them as individual houses in a neighborhood.
• The Wires (Interconnects): These are the roads that let the houses talk to each other.
• The Old Way: Previously, scientists tried to lay all the roads on the ground level. As the neighborhood grew, the roads got crowded, and you couldn't get to the houses in the middle without walking through the houses on the outside.
• The New Way (This Paper): They used a technique common in making computer chips (called BEOL or "Back-End-of-Line") to build three separate layers of roads on top of each other.
  • Imagine a house with a driveway on the ground, a bridge on the second floor, and a highway on the third floor.
  • This allows them to route signals to any qubit in the grid without the wires crossing over each other and causing interference.

The Magic Trick: "Exchange-Only" Qubits

The team didn't just build the grid; they also used a special type of qubit called an Exchange-Only (EO) qubit.

Think of a standard qubit like a spinning top that needs to be perfectly balanced. If the wind (noise) blows, it falls over.
The Exchange-Only qubit is like a trio of friends holding hands in a circle. Instead of relying on one person to stay balanced, they rely on their connection to each other.

• The Benefit: Even if one friend stumbles (a defect in the chip), the group can rearrange themselves to keep the circle going.
• The Result: Because of this flexibility, if a specific part of their 2D grid is broken (a "dead" qubit), they can simply route the information around it, like a GPS rerouting you around a traffic jam. They can form "L-shaped" connections instead of just straight lines.

The Results: Does it Work?

The researchers built a small test version (a 2x3 grid, which is like a tiny parking lot with 6 spots) using this new 3-layer wiring system. They tested it rigorously:

1. No Signal Loss: They proved that adding those extra layers of "roads" didn't make the qubits slower or noisier. The performance was just as good as the simpler, single-layer versions.
2. High Accuracy: They achieved 99.9% accuracy in their operations. In the world of quantum computing, this is a huge deal. It means the "traffic" is moving smoothly, and the "cars" (qubits) are arriving at their destinations almost perfectly.
3. Flexibility: They showed they could create qubits in straight lines and in right-angle corners, proving the grid is truly reconfigurable.

Why This Matters

This paper is a "proof of concept" that says: "We can use standard industrial manufacturing techniques to build massive, 2D quantum computers."

Before this, people worried that making a 2D quantum grid would require custom, impossible-to-build wiring. This team showed that by stacking layers of metal wires (just like modern smartphones do), we can scale up silicon qubits from a small line to a massive, fault-tolerant city.

In short: They took the blueprint for a skyscraper (multi-layer wiring) and applied it to a quantum neighborhood, proving that we can build a massive, flexible, and highly accurate quantum city using the factories we already have.

Technical Summary

1. Problem Statement

Silicon-based spin qubits are a leading platform for quantum computing due to their long coherence times and compatibility with industrial semiconductor manufacturing. However, scaling these systems to large, two-dimensional (2D) arrays presents a significant fabrication challenge:

• Routing Constraints: Maintaining independent control of individual spins in a 2D array requires signal routing lines that are topographically separate from the gate electrodes. Traditional "in-line" routing at the gate level creates connectivity bottlenecks in scaled arrays.
• Yield and Uniformity: Alternative scaling methods, such as crossbar structures without dedicated interconnects, often require shared qubit control, which imposes strict bounds on yield and uniformity.
• Defect Tolerance: Current demonstrations have largely been limited to linear 1D arrays. A true 2D platform is needed to reconfigure qubit connectivity around defective quantum dots or exchange interaction sites, which is critical for practical yield in large-scale devices.

2. Methodology

The authors, from HRL Laboratories, leveraged and extended the SLEDGE (Single-Layer Etch-Defined Gate Electrode) fabrication process to create a scalable 2D spin qubit platform.

• Fabrication Process:

  • The device utilizes a Si/SiGe heterostructure with a 3 nm Si quantum well (800 ppm $^{29}$Si).
  • They implemented a multi-layer Back-End-of-Line (BEOL) process, a standard technique in semiconductor manufacturing. The specific device demonstrated uses three BEOL metal layers (Metal 1, 2, and 3) and corresponding vias to route signals to different gate rows.
  • The gate stack consists of an Al$_2$O$_3$/HfO$_2$/TiN film deposited via Atomic Layer Deposition (ALD), with gates defined by subtractive etching.
  • The device features a 2×3 plunger gate array (two rows of three plunger gates), totaling five rows of gates: two for qubit formation, one for charge sensing, one for inter-qubit exchange, and one for charge loading.

• Qubit Encoding:

  • The study utilizes Exchange-Only (EO) qubits encoded in a Triple-Quantum-Dot (TQD) decoherence-free subsystem (DFS).
  • This encoding uses three spins to form a logical qubit, specifically utilizing singlet-triplet pairs.
  • The authors demonstrated that EO qubits can be formed in both linear and right-angle (elbow) configurations within the 2D lattice.

• Control and Readout:

  • Initialization/Readout: Performed via Pauli spin blockade at a dedicated double-quantum-dot (DQD) sensor (P2-P3).
  • State Transfer: Calibrated spin swaps (exchange interactions) are used to coherently move singlet states between the sensor and arbitrary TQDs in the array.
  • Characterization: The team used Blind Randomized Benchmarking (BRB) to measure single-qubit gate fidelities, error rates, and leakage rates.

3. Key Contributions

• First Multilayer BEOL Spin Qubit Array: This work demonstrates the first extendable 2D spin qubit array utilizing multiple BEOL interconnect layers (up to three) for signal routing, proving that industrial semiconductor interconnect techniques can be applied to quantum devices without degrading performance.
• 2D Reconfigurability: The authors successfully demonstrated that EO qubits can be instantiated in non-linear (elbow) configurations. This allows the system to route around defective gates or quantum dots, significantly enhancing the potential yield of large-scale arrays.
• Scalable Architecture: The paper establishes a design rule where $N$ rows of plunger gates require $N+1$ BEOL layers, providing a clear path for scaling to larger 2D grids.

4. Key Results

• Performance Preservation: The addition of multiple BEOL layers did not result in measurable performance degradation. The exchange coherence (quantified by $N_{osc}$, the number of oscillations at 1/e decay) was consistent with single-layer devices.
• High Fidelity:
  • The average single-qubit gate fidelity across 10 characterized EO qubit permutations was >99.8% (Error rate $\epsilon \approx 1.6 \times 10^{-3}$).
  • By optimizing pulse durations ($t_{pulse}=5$ ns, $t_{idle}=10$ ns), the team achieved an average single-qubit gate fidelity greater than 99.9% for specific qubits (e.g., X4Y5), with an error rate of $(7.9 \pm 0.2) \times 10^{-4}$.
  • Leakage rates were measured at $(2.8 \pm 0.5) \times 10^{-4}$.
• Defect Tolerance Demonstration: The study confirmed that in a 2×3 array, there are 10 possible TQD configurations and 20 EO qubit assignments. The ability to use both linear and elbow arrangements allows the system to maximize the number of functional qubits even if specific exchange gates fail.
• No Layer Correlation: Statistical analysis showed no correlation between the specific BEOL layer used to contact a gate and the resulting exchange noise ($N_{osc}$), confirming that the interconnect layers do not introduce significant charge noise.

5. Significance and Future Outlook

• Industrial Scalability: This work bridges the gap between academic quantum device research and industrial manufacturing. By utilizing standard BEOL processes, it validates that silicon spin qubits can leverage the massive infrastructure of the semiconductor industry for scaling.
• Path to Large-Scale Arrays: The demonstrated 2D reconfigurability is a critical step toward fault-tolerant quantum computing, as it provides a mechanism to work around the inevitable fabrication defects found in large-scale production.
• Future Challenges: The authors note that while three layers work well, scaling further will require addressing:
  • Overlay Accuracy: Maintaining alignment between layers (currently ~20 nm accuracy required) may necessitate a shift from electron-beam lithography to Extreme Ultraviolet (EUV) lithography.
  • Signal Integrity: Managing crosstalk, resistance, and capacitance as the number of BEOL layers increases.
  • Sensor Sensitivity: The $1/r^3$ scaling of charge sensor sensitivity may limit the size of 2D arrays unless peripheral sensors or new readout schemes are developed.

In conclusion, this paper provides a robust proof-of-concept that industrial multilayer interconnect processes can be successfully integrated with silicon spin qubits to create high-fidelity, reconfigurable, and scalable 2D quantum processor architectures.