Substrate insulated Josephson junctions for superconducting quantum circuits

The paper presents a novel fabrication technique for high-quality Josephson junctions using a three-dimensional patterned, low-loss substrate instead of organic resists, which eliminates decoherence-inducing materials and enables the creation of superconducting quantum circuits capable of operating at higher speeds and temperatures.

The Gist

Imagine you are trying to build a super-fast, ultra-sensitive electronic switch called a Josephson junction. These switches are the heart of superconducting quantum computers. Currently, most of these switches are built using a "sandwich" technique: two layers of metal with a tiny insulating barrier in the middle.

The problem is that the standard way to build these sandwiches uses organic resists (think of them like sticky, temporary glue or masking tape used in printing) and leaves behind organic residue or oxides right next to the switch. In the world of quantum computing, these leftovers are like dust motes in a laser beam; they cause "decoherence," which is basically static noise that ruins the delicate quantum calculations.

Furthermore, the current standard material (Aluminum) is like a low-melting-point candle. It works well, but it limits how hot the computer can get and how fast it can run. If you try to use stronger, faster materials like Tantalum or Niobium (which are like high-melting-point steel), the heat required to lay them down usually burns up the sticky "masking tape" (the organic resist), ruining the whole process.

The New Solution: Carving the Floor, Not Painting the Walls

The authors of this paper developed a clever new way to build these switches. Instead of using sticky tape to define the shape of the switch, they carve the floor itself.

Think of the substrate (the base material the chip sits on) as a piece of wood. Instead of drawing a line on it and painting over it, they use a special process (like a high-tech woodcarver) to cut a deep, precise trench with a specific shape:

1. The Overhang: A little roof sticking out.
2. The Undercut: A hidden shelf underneath that roof.

This carved shape acts as a natural shield. When they deposit the metal layers to make the switch, the overhang blocks the metal from touching the wrong places, just like a roof keeps rain off a porch. This means they don't need any sticky tape or organic masks. They can wash the "floor" completely clean with acid right before building the switch, ensuring no dirt or residue is left behind.

The Different "Blueprints"

The paper describes a few different ways to carve these trenches to make the switch:

• The Step-Edge (SEI): Imagine a staircase with a hidden ledge. You build the bottom part of the switch on the lower step and the top part on the upper step. The hidden ledge (undercut) prevents the top metal from accidentally touching the bottom metal, which would cause a short circuit.
• The Manhattan Trench (MT): Imagine a city grid where two streets cross. The switch is built exactly where the two streets intersect. The walls of the streets act as shadows, ensuring the metal layers only meet in the very center, creating a perfect, isolated junction.
• The Bridge Trench: Imagine a bridge over a river with a small gap in the middle. The switch forms under the bridge, isolated by the gap.

Why This Matters (According to the Paper)

The researchers tested this method using Niobium, a strong metal that melts at a much higher temperature than Aluminum. Because they didn't use organic tape, they could heat the metal as much as needed without burning anything.

The Results:

• Cleanliness: The switches are free from the "dirt" (organic residues and unwanted oxides) that usually causes noise.
• Quality: When they tested the switches, they showed a "hysteresis" (a specific lag in the electrical current). In simple terms, this is like a door that stays firmly shut or firmly open, rather than wobbling back and forth. This indicates a very high-quality, stable switch.
• Versatility: They successfully made switches of different sizes and shapes. They also tested the materials and found that the "floor" (the silicon substrate) was smooth enough to support high-quality metal films, with a critical temperature (the point where it becomes superconductive) similar to pristine, uncarved surfaces.

The Bottom Line

The paper claims that by carving the substrate instead of using sticky masks, they can build high-quality Josephson junctions using a wider variety of materials (like Niobium) and under harsher conditions. This allows for quantum circuits that can potentially operate at higher speeds and warmer temperatures than current technology allows, all while keeping the environment around the switch incredibly clean and free of noise-causing contaminants.

Technical Summary

Technical Summary: Substrate Insulated Josephson Junctions for Superconducting Quantum Circuits

Problem Statement
Superconducting quantum circuits currently rely heavily on Aluminum/Aluminum Oxide/Aluminum (Al/AlOx/Al) trilayer Josephson junctions (JJs). While the AlOx tunnel barrier offers exceptional quality and aluminum's low melting point facilitates standard fabrication using organic resists and angle-dependent patterning, this approach imposes strict operational limits. The relatively low superconducting gap energy of aluminum restricts circuit operating temperatures to $\lesssim 300$ mK and frequencies to $\lesssim 40$ GHz.

To overcome these limitations, researchers seek to utilize high-gap superconductors such as Tantalum (Ta), Niobium (Nb), or Niobium Titanium (NbTi). However, these materials possess significantly higher melting points, requiring higher deposition temperatures that can damage organic resists. Furthermore, alternative deposition techniques like magnetron sputtering, which can handle these materials, often necessitate the use of lossy dielectric materials near the junctions to provide electrical isolation. These dielectrics introduce excess noise and decoherence. Additionally, aggressive wet-etching steps used to remove dielectrics can damage delicate junction interfaces.

Methodology
The authors propose a fabrication technique that eliminates the need for organic resists and lossy dielectric isolation materials by employing a three-dimensional patterned, low-loss substrate. The core concept is "substrate profiling," where a specific step geometry with an undercut electrically disconnects metal films deposited on different levels of the substrate.

The paper details several specific junction geometries based on this principle:

1. Step Edge Insulated (SEI) Junction: Utilizes a substrate step with an overhang (height $\alpha$) and an undercut (height $\beta$, depth $\gamma$). A trilayer (M1/TB1/M2) is deposited in situ. The undercut prevents a parasitic sidewall film (SWF) from shorting the junction by ensuring the bottom electrode thickness ($\epsilon$) is less than the undercut height ($\beta$) and the trench depth ($\gamma$) is sufficient.
2. Cross Step Edge Insulated (cSEI) Junction: Uses a second parallel step edge to define a confining trench for the bottom electrode (BE). The top electrode (TE) is patterned perpendicularly. This relaxes alignment accuracy requirements compared to the SEI.
3. Planarized cSEI (p-cSEI): Adds a chemical-mechanical polishing (CMP) step after trilayer deposition to remove height differences, simplifying subsequent interconnect formation.
4. Manhattan Trench (MT) Junction: Formed at the intersection of two perpendicular trenches on a single substrate level (S1). By rotating the sample azimuth between M1 and M2 depositions, the BE is formed in one trench and the TE in the other. The junction is shielded from sidewall shorts ($\delta + \epsilon < \beta$).
5. Cross-Trench (cT) Junction: Involves planarizing the wafer below the S2 level after M1 deposition, followed by aggressive cleaning and subsequent TB1/M2 deposition.

The fabrication process utilizes the Bosch process on silicon substrates to create precise undercut profiles. The junction electrodes are defined by lithography and etching, but the critical isolation is achieved geometrically by the substrate step, ensuring the junction vicinity remains free of organic resist residues and lossy dielectrics. The only dielectric material in proximity to the junction is the low-loss substrate crystal (typically high-resistivity Si or sapphire).

Key Results
The authors fabricated and characterized underdamped Nb/AlOx/Nb junctions using these techniques:

• Junction Quality: I-V characterization of SEI junctions (nominal area $100 \, \mu\text{m}^2$) at 4.2 K showed pronounced hysteresis and a low retrapping current, indicative of high-quality underdamped junctions. The extracted gap voltage was $V_g = 2.78$ mV.
• Material Compatibility: Niobium films deposited on the patterned substrate (S1) exhibited a critical temperature ($T_c$) of 9.0 K, comparable to films on pristine substrates, despite the increased surface roughness ($S_a \approx 1.2$ nm vs. 0.8 nm) introduced by the Bosch etch.
• Microwave Performance: Niobium $\lambda/4$ coplanar waveguide (CPW) resonators fabricated using the CMP technique demonstrated an internal quality factor exceeding $3 \times 10^5$ at millikelvin temperatures.
• Interface Integrity: Tests on two-layer resonators, where the interface between M1 and M2 was exposed to ion milling, showed no degradation in quality factor compared to single-layer resonators.
• Scaling: Analysis of critical current density ($J_c$) across various junction sizes revealed that leakage currents are primarily associated with junction edges rather than the bulk area, as the leakage ratio ($R_{sg}/R_n$) increased with junction size.

Significance and Claims
The paper claims to have established a robust substrate-profiling technique for fabricating Josephson junctions that are free from intentionally introduced oxides and organic material residues, which are known sources of decoherence. The method enables the fabrication of high-quality trilayer junctions from a wide range of geometries and materials, including high-melting-point superconductors like Tantalum and Niobium.

The authors state that this approach allows for the manufacturing of quantum circuits capable of operating at higher speeds and elevated temperatures by utilizing materials with larger superconducting gap energies. The technique is presented as largely independent of the specific superconductor, tunneling barrier, deposition technique, or cleaning method used, offering a versatile pathway for advancing superconducting quantum circuit performance beyond the limitations of traditional aluminum-based processes.