⚛️ quantum physics

Comparing a Few Qubit Systems for Superconducting Hardware Compatibility and Circuit Design Sensitivity in Qiskit

This paper investigates the trade-offs between circuit complexity, noise robustness, and resource utilization for three fundamental quantum circuits (QFT, GHZ, and W states) on IBM's Sherbrooke superconducting processor, demonstrating that circuit fidelity can serve as an indirect probe of material-induced noise to guide the design of scalable, hardware-aware quantum applications.

Original authors: Hillol Biswas

Published 2026-04-07

📖 6 min read🧠 Deep dive

CC BY 4.0

Original authors: Hillol Biswas

Original paper licensed under CC BY 4.0 (http://creativecommons.org/licenses/by/4.0/). ✨ This is an AI-generated explanation of the paper below. It is not written or endorsed by the authors. For technical accuracy, refer to the original paper. Read full disclaimer

The Big Picture: The "Perfect World" vs. The "Real World"

Imagine you are an architect designing a magnificent, glass skyscraper. In your computer simulation (the Simulator), the building is perfect. The glass is flawless, the wind doesn't rattle the windows, and the elevators move at the speed of light. This is what quantum computers look like in theory.

But when you try to build the actual skyscraper in the real world (the Real Quantum Hardware), things get messy. There is wind, dust, and the materials aren't perfect. The elevators get stuck, and the glass cracks a little. This is the reality of current quantum computers, which are still in their "teenage years" (a phase scientists call NISQ).

This paper is about testing three specific types of "blueprints" (quantum circuits) to see how well they hold up when moving from the perfect computer simulation to the messy real-world machine.

The Three "Blueprints" (The Circuits)

The author tested three fundamental quantum patterns, which are like the alphabet of quantum computing. You need to master these before you can write a "book" (a complex algorithm).

The Quantum Fourier Transform (QFT):
- The Analogy: Think of this as a super-fast music equalizer. If you have a messy song with many instruments playing at once, the QFT can instantly separate them out to show you the individual notes. It's incredibly powerful for finding patterns.
- The Test: How does this equalizer sound when the speakers are slightly broken?
The GHZ State:
- The Analogy: Imagine a group of telepathic twins. If one twin sneezes, all of them sneeze at the exact same instant, no matter how far apart they are. They are all "on" or all "off" together. This is a state of total unity.
- The Test: If the telepathy signal gets a little static, do they all sneeze at once, or does the connection break?
The W State:
- The Analogy: Imagine a musical relay race where only one person holds the baton (is "active"), but you don't know who it is. If one runner drops the baton, the others can pick it up. It's a "robust" state because even if one part fails, the others can still function.
- The Test: How well does this relay race survive a muddy track?

The Experiment: The "Sherbrooke" Machine

The researcher took these blueprints and ran them on IBM's Sherbrooke, a real quantum computer with 127 qubits (the "atoms" of the computer).

The Simulator: They ran the blueprints on a super-computer first. This was the "Perfect World" test.
The Real Machine: They then ran the exact same blueprints on the Sherbrooke chip. This was the "Real World" test.

The Problem: The real machine is made of superconducting metal loops that are incredibly sensitive. They are like ice sculptures in a warm room. The "noise" (heat, material flaws, electrical interference) causes the ice to melt (decoherence) before the experiment is finished.

The "Transpilation" Translation

Here is a crucial part of the paper: You can't just take a blueprint designed for a generic computer and drop it onto the Sherbrooke chip. The chip has a specific layout, like a city with one-way streets.

Transpilation is like a GPS re-routing your car. If your original plan was to go straight, but the street is closed, the GPS (the Qiskit software) has to find a detour.
The Result: The detour makes the trip longer. The paper found that to make the circuits work on the real chip, the software had to add a massive number of extra steps (gates).
- Analogy: A simple 4-step dance routine became a 1,000-step routine just to fit the dance floor's shape.

The Findings: What Happened?

The "Noise" Showed Up:
When they compared the results, the Simulator was perfect (a clean histogram). The Real Machine was messy (a noisy histogram). The "perfect" results were drowned out by static.
Size Matters (The Scaling Problem):
As they added more qubits (making the circuit bigger), the difference between the Simulator and the Real Machine grew huge.
- The RAM Analogy: The paper notes that simulating 30 qubits on a normal computer requires 16GB of RAM. Simulating 37 qubits requires 2 Terabytes (2,000 GB). This is why we need real quantum computers; our classical computers literally run out of memory trying to simulate them.
The "Material Detective" Insight:
This is the most interesting part of the paper. The author suggests that how badly a circuit fails tells us about the quality of the metal.
- The Analogy: Imagine tapping a wine glass. If it rings clearly, the glass is good. If it sounds dull, there's a crack inside.
- The paper argues that by watching how the "W State" or "GHZ State" breaks down, we can indirectly "listen" to the flaws in the superconducting materials. If a circuit fails faster than expected, it means the hardware has more "defects" (like tiny impurities in the metal).

The Conclusion: Why Does This Matter?

The paper concludes that we can't just build bigger quantum computers and expect them to work perfectly. We have to design them with the hardware in mind.

The Takeaway: We are currently in the "Noisy" era. To get useful results, we need to use "Error Mitigation" (like noise-canceling headphones for quantum data) and design circuits that are robust enough to survive the messy real world.
The Future: By understanding how these basic circuits fail, we can not only build better software but also improve the physical materials used to build the chips. It's a feedback loop: Better circuits help us test better materials, and better materials allow for better circuits.

In short: The paper is a stress test for the "alphabet" of quantum computing, showing us that while the letters look great on paper, writing a sentence with them on a shaky, noisy table is much harder—and that the shaking of the table tells us a lot about the table itself.

1. Problem Statement

The paper addresses the critical gap between ideal quantum circuit simulations and the execution of those circuits on real-world Noisy Intermediate-Scale Quantum (NISQ) hardware.

Hardware Limitations: Superconducting qubit systems (specifically IBM's) suffer from material-induced flaws, interfaces, and decoherence. These factors cause gate fidelity to drop and errors to accumulate as circuit depth increases.
Simulation vs. Reality: While classical simulators provide idealized outputs, they fail to account for the specific noise profiles, connectivity constraints, and calibration limitations of physical Quantum Processing Units (QPUs).
Scalability Challenge: As quantum circuits grow (from 4 to 10+ qubits), the disparity between simulator results and QPU execution widens. There is a lack of systematic frameworks to understand how specific circuit primitives (like QFT, GHZ, and W states) interact with hardware constraints and material defects.
Resource Constraints: Classical simulation of large quantum systems faces exponential memory growth (e.g., 37 qubits require ~2TB of RAM), making it impossible to simulate large-scale circuits without quantum hardware, yet hardware execution is currently too noisy for reliable large-scale results without mitigation.

2. Methodology

The study employs a comparative analysis approach using the Qiskit framework to evaluate three fundamental quantum circuit classes across varying qubit counts (4 to 10 qubits).

Circuit Classes:
1. Quantum Fourier Transform (QFT): Used for frequency-domain manipulation and algorithms like Shor's.
2. Greenberger–Horne–Zeilinger (GHZ) State: A maximally entangled state ( $|00...0\rangle + |11...1\rangle$ ).
3. W State: A robust entangled state ( $\sum |0...1...0\rangle$ ) known for resilience to particle loss.
Hardware & Simulation Setup:
- Simulator: Qiskit Aer statevector simulator (ideal conditions).
- Hardware: IBM Sherbrooke 127-qubit superconducting processor (Eagle r3 architecture).
- Execution: All circuits were run with 4096 shots on both the simulator and the QPU.
Transpilation: Abstract circuits were transpiled using Qiskit's compiler to map them onto the Sherbrooke backend's native gate set (ECR, $R_Z$ , $SX$, etc.) and connectivity (HeavyHex lattice).
Metrics & Analysis:
- Statistical Distance Measures: Total Variation Distance (TVD), Kullback–Leibler (KL) divergence, Jensen–Shannon divergence, and Hellinger distance were calculated to quantify the difference between simulator and QPU output distributions.
- Circuit Complexity: Analysis of post-transpilation depth, width (qubit count), and gate counts.
- Error Mitigation: Application of techniques such as Dynamical Decoupling, Gate Twirling, and M3 (Measurement Error Mitigation) to specific circuits to observe performance gains.

3. Key Contributions

Systematic Benchmarking: The paper provides a comprehensive comparison of 21 baseline circuits (3 types $\times$ 7 qubit sizes) against their transpiled counterparts on real hardware.
Material-Noise Correlation: It proposes a novel conceptual framework where circuit fidelity serves as an indirect probe of material quality. The study suggests that the exponential decay of fidelity with circuit depth is a signature of underlying material defects (e.g., Two-Level Systems or TLS) and interface losses.
Transpilation Overhead Quantification: The research quantifies the massive overhead introduced by transpilation. For example, a 10-qubit W-state circuit saw its gate count explode from a theoretical minimum to 13,626 gates after mapping to the Sherbrooke backend.
Circuit-Specific Sensitivity: The study identifies that different circuit topologies have varying sensitivities to hardware noise:
- GHZ states showed the lowest susceptibility due to structural simplicity.
- W states exhibited the highest overhead and noise sensitivity due to complex entanglement structures requiring extensive routing.
- QFT demonstrated favorable properties for modular workflows but still suffered significant depth inflation.

4. Key Results

Divergence at Scale:
- For 4-qubit systems, simulator and QPU results showed noticeable differences (noise in QPU histograms), but the circuits were still recognizable.
- As qubit counts increased (5–10), the statistical distance metrics (TVD, KL, Hellinger) generally increased, indicating a loss of quantum information fidelity.
Optimal Qubit Thresholds:
- The study identified specific "sweet spots" where simulation and hardware results were closest (lowest error metrics):
  - QFT: 6 qubits.
  - GHZ: 5 qubits.
  - W State: 4 qubits.
- Beyond these thresholds, error accumulation became dominant, requiring aggressive error mitigation.
Transpilation Impact:
- Depth & Width: Transpilation significantly increased circuit depth and width. For instance, a 10-qubit QFT circuit depth increased from 2 to 401, and the W-state depth increased from 2 to 7,083.
- Gate Composition: The transpiled circuits were dominated by single-qubit phase rotations (specifically $R_Z$ gates), with W-state circuits reaching up to 13,623 $R_Z$ gates. This highlights the heavy reliance on virtual Z-gates and the cost of routing on the HeavyHex lattice.
Memory Constraints: The paper reinforces the necessity of quantum hardware by showing that simulating 37 qubits requires ~2048 GB of RAM, whereas current quantum processors can execute these tasks (albeit with noise) without such classical memory overhead.

5. Significance and Conclusion

Hardware-Aware Design: The paper concludes that future quantum algorithm design cannot be purely theoretical. It must be co-optimized with hardware constraints (connectivity, native gates) and material limitations.
Circuit Benchmarking as Material Science: A significant contribution is the suggestion that running specific circuit benchmarks can act as a diagnostic tool for material engineering. By analyzing how different circuit classes degrade, researchers can infer the nature of defect-induced noise (e.g., TLS) in superconducting qubits.
Path to Scalability: The findings underscore that while simulators are useful for small-scale validation, the transition to practical quantum advantage in the NISQ era relies on:
1. Error Mitigation: Essential for correcting noise in circuits deeper than 4–6 qubits.
2. Efficient Transpilation: Reducing the overhead of mapping logical circuits to physical hardware.
3. Modular Architecture: Building complex applications from robust primitives (like QFT and GHZ) that are tailored to specific hardware topologies.

In summary, this work bridges the gap between quantum algorithm theory and superconducting hardware reality, demonstrating that circuit performance is not just a function of the algorithm, but a direct reflection of the physical device's material quality and architectural constraints.