Technical Summary: AUTOSIZER

Problem Statement

The design of Analog and Mixed-Signal (AMS) integrated circuits remains a significant bottleneck in Electronic Design Automation (EDA), particularly regarding transistor sizing. This task is characterized by high-dimensional design spaces, nonlinear circuit behaviors, and strict performance constraints. Traditional optimization methods, such as Bayesian Optimization (BO), Reinforcement Learning (RL), and genetic algorithms, typically treat the circuit as a static black box. While these methods have improved sample efficiency over brute-force approaches, they often fail to adapt to intermediate optimization dynamics, ignore domain-specific analog expertise, and struggle with sparse feasibility regions in complex circuits.

Although Large Language Models (LLMs) have demonstrated strong reasoning capabilities in scientific domains, existing LLM-based agents for circuit design often rely on fixed optimization algorithms and single-stage workflows. These agents interpret circuit netlists and apply predetermined strategies without iterative self-reflection or feedback-driven refinement of the search space itself. Consequently, they lack the ability to adapt the optimization process dynamically in response to simulation outcomes, limiting their robustness across diverse and complex AMS topologies.

Methodology: The AUTOSIZER Framework

To address these limitations, the authors propose AUTOSIZER, a reflective, LLM-driven meta-optimization framework. AUTOSIZER unifies circuit understanding, adaptive search-space construction, and optimization orchestration into a closed-loop, two-loop architecture.

1. Two-Loop Optimization Architecture

The framework operates via an inner loop and an outer loop:

• Inner Loop (Numerical Sizing): This loop performs the actual circuit sizing using a configurable optimization engine. It supports multiple algorithms, including Latin Hypercube Sampling (LHS), Genetic Algorithms (GA), Bayesian Optimization (BO), and Simulated Annealing (SA). The inner loop evaluates candidate designs via circuit simulation against user-defined specifications and a Figure of Merit (FoM).
• Outer Loop (Reflective Search-Space Refinement): This loop analyzes the optimization history, convergence behavior, and constraint satisfaction from the inner loop. Based on this analysis, it performs self-reflection to iteratively refine the search space. This involves adjusting variable priorities, expanding or tightening parameter ranges, and re-activating previously fixed variables.

2. Multi-Agent Workflow

AUTOSIZER employs specialized LLM agents to manage different stages of the workflow:

• Circuit Understanding Agent: Analyzes the circuit netlist and user specifications to identify the topology, key sizing variables, and their functional roles. It infers performance sensitivities and trade-offs (e.g., how transistor width affects gain vs. power) to guide the search.
• Search-Space Decision Agent: Uses the circuit understanding output to prioritize variables and dynamically assign feasible ranges. It aims to reduce the search space dimensionality by focusing on high-impact parameters while fixing less critical ones, thereby improving sample efficiency.
• Optimization Orchestration Agent: Selects and configures the optimization algorithm for the inner loop based on the current stage (exploration vs. exploitation), available simulation history, and search-space characteristics.

3. Adaptive Search-Space Construction

Inspired by analog design practices, AUTOSIZER employs a progressive, feedback-driven strategy. It begins with a compact search space defined by a small set of high-impact variables. If the optimization stagnates or fails to find feasible solutions, the outer loop systematically reformulates the problem by "unfixing" variables or expanding their ranges. This allows the system to recover from suboptimal initial assumptions and explore promising regions that were initially excluded.

Key Contributions

The paper presents three primary contributions:

1. AUTOSIZER Framework: A multi-agent LLM framework that formulates AMS sizing as a meta-optimization problem. It integrates circuit understanding, adaptive search-space construction, and algorithm orchestration into a unified closed-loop workflow. The framework distinguishes itself by enabling the LLM to not just interpret the circuit, but to actively modify the optimization strategy and search space based on simulation feedback.
2. AMS-SIZINGBENCH: A new, open-source benchmark suite built on the SKY130 CMOS technology. It comprises 24 diverse analog and mixed-signal circuits (including OTAs, oscillators, filters, voltage references, and regulators) spanning a wide range of design complexities. Each instance includes standardized netlists, sizing variables, constraints, and a complete simulation workflow to facilitate reproducible evaluation and fair comparison of adaptive optimization policies.
3. Comprehensive Evaluation: Extensive experiments on AMS-SIZINGBENCH demonstrate that AUTOSIZER consistently outperforms both traditional optimization methods (GA, BO, TuRBO) and existing LLM-based agents (ADO-LLM, LEDRO, EE-Sizer) in terms of convergence speed, solution quality (FoM), and success rate, particularly on difficult, constraint-tight designs.

Experimental Results

The authors evaluated AUTOSIZER against traditional baselines and other LLM-based agents across Easy, Medium, and Hard difficulty splits of the AMS-SIZINGBENCH.

• Performance: AUTOSIZER achieved a 100% success rate across all difficulty levels, significantly outperforming traditional methods (which dropped to 25–50% success on Hard circuits) and other LLM agents (which ranged from 41% to 80% on Hard circuits).
• Efficiency: The framework required fewer evaluations to reach the best solution compared to baselines, demonstrating higher sample efficiency.
• Ablation Studies: Removing the Self-Reflection Loop (SRL) caused a 39.4% drop in FoM and a drastic reduction in success rate (from 100% to 20%), highlighting that iterative refinement is more critical than initial search space decisions. The study also revealed that the synergy between Circuit Understanding and Search Space Decision is vital; without accurate circuit understanding, search space reduction can lead to suboptimal results.
• Adaptive Dynamics: Analysis of the optimization process showed that AUTOSIZER dynamically switches between exploration (e.g., LHS, GA) and exploitation (e.g., BO, SA) strategies and adapts the search space (expanding ranges or unfixing variables) based on stagnation detection, a capability absent in fixed-strategy baselines.

Significance and Claims

The authors position AUTOSIZER as a step toward reliable and scalable LLM-driven AMS circuit design automation. They claim that by treating sizing as a reflective meta-optimization problem, the framework overcomes the rigidity of existing agents that rely on fixed search spaces or single-stage workflows. The introduction of AMS-SIZINGBENCH is presented as a necessary foundation for systematic and reproducible evaluation in this field, addressing the lack of standardized benchmarks for diverse circuit topologies.

The paper emphasizes that the framework is designed to augment human designers rather than replace them. The LLM-generated reasoning serves as an interpretable tool for education and verification, with the final designs requiring standard verification flows before fabrication. The authors express hope that AUTOSIZER and the accompanying benchmark will facilitate future research into adaptive, data-efficient, and robust AI-assisted design automation for complex analog and mixed-signal systems.