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R2G: A Multi-View Circuit Graph Benchmark Suite from RTL to GDSII

The paper introduces R2G, a comprehensive multi-view circuit graph benchmark suite that standardizes five stage-aware representations across 30 open-source IP cores to decouple representation choices from model selection, revealing that view selection and decoder depth are more critical than GNN architecture for achieving high accuracy in physical design tasks.

Original authors: Zewei Zhou, Jiajun Zou, Jiajia Zhang, Ao Yang, Ruichao He, Haozheng Zhou, Ao Liu, Jiawei Liu, Leilei Jin, Shan Shen, Daying Sun

Published 2026-04-13

📖 5 min read🧠 Deep dive

CC BY 4.0

Original authors: Zewei Zhou, Jiajun Zou, Jiajia Zhang, Ao Yang, Ruichao He, Haozheng Zhou, Ao Liu, Jiawei Liu, Leilei Jin, Shan Shen, Daying Sun

Original paper licensed under CC BY 4.0 (http://creativecommons.org/licenses/by/4.0/). ✨ This is an AI-generated explanation of the paper below. It is not written or endorsed by the authors. For technical accuracy, refer to the original paper. Read full disclaimer

Imagine you are trying to teach a computer how to design a microchip. It's like trying to teach a student how to build a house, but instead of bricks and wood, you're dealing with billions of tiny electronic components (transistors) that need to be packed into a space smaller than a fingernail.

The paper introduces a new tool called R2G (RTL-to-GDSII). Think of R2G as a universal translator and a standardized test kit for AI researchers trying to solve chip design problems.

Here is the breakdown using simple analogies:

1. The Problem: Everyone Speaking a Different Dialect

Before this paper, researchers trying to use AI for chip design were like a group of people trying to solve a puzzle, but everyone was using a different language and a different set of rules.

The Dialect Issue: One researcher might describe a circuit as a list of connections (like a phone book). Another might describe it as a map of where things sit on a table. A third might describe it as a flow of water through pipes.
The Result: If Researcher A's AI is better than Researcher B's AI, is it because Researcher A's brain (the AI model) is smarter? Or is it just because Researcher A's language (the data format) was easier to understand? Nobody knew, because they never compared them fairly.

2. The Solution: R2G (The Universal Translator)

R2G fixes this by creating a standardized "Multi-View" dataset.

The Analogy: Imagine you have a complex sculpture. R2G takes that exact same sculpture and creates five different photos of it:
1. A photo from the front.
2. A photo from the side.
3. A photo from above.
4. A photo showing the internal wiring.
5. A photo showing the material texture.
The Magic: Crucially, R2G ensures that every photo contains the exact same information, just organized differently. This allows researchers to say, "Okay, let's use the same AI brain to look at all five photos. Which photo helps the AI learn the fastest?"

3. The Two Big Jobs: Placement and Routing

Chip design has two main physical challenges, which R2G focuses on:

Placement (The Moving Day): You have a bunch of furniture (logic gates) and a room (the chip). You need to figure out where to put every piece of furniture so they fit and don't bump into each other.
- R2G's Finding: The AI works best when it sees the furniture as individual objects (nodes) rather than just lines connecting them. It's like trying to organize a room; you need to see the chairs and tables, not just the strings connecting them.
Routing (The Wiring): Once the furniture is placed, you need to run wires between them without tangling them up.
- R2G's Finding: Even for wiring, looking at the components as individual objects still works best.

4. The Big Surprises (What They Learned)

The researchers ran experiments using different types of AI "brains" (models) and different "photos" (views). They found three surprising things:

Surprise #1: The Photo Matters More Than the Brain.
- Analogy: It doesn't matter if you give a genius (a complex AI model) a blurry, confusing photo; they will fail. But if you give a smart student a crystal-clear, well-lit photo, they will ace the test.
- The Result: Changing the way the data is viewed (the "photo") changed the AI's performance by a huge amount (more than 30%). The choice of how to show the data was more important than the choice of which AI to use.
Surprise #2: Don't Overthink the "Brain" Depth.
- Analogy: People thought they needed a super-deep, complex AI brain (like a 10-story building) to solve this. R2G found that a 3-to-4 story building was actually perfect. Making it taller (deeper) just made the AI confused and forgetful (a problem called "over-smoothing").
- The Result: You don't need a massive AI; you just need the right size.
Surprise #3: The "Translator" at the End is Key.
- Analogy: Imagine the AI brain is a translator who understands the language perfectly, but the person at the end (the "Decoder Head") is the one actually writing the final report. R2G found that if the person writing the report is too simple (shallow), the report is garbage. But if you give them a slightly more complex notebook (3–4 layers deep), the report becomes perfect.
- The Result: The secret to near-perfect predictions wasn't making the AI brain bigger; it was making the final step of processing the answer slightly more sophisticated.

Summary

R2G is a new, fair playground for AI researchers. It proved that:

How you show the data is more important than which AI model you pick.
Simple is often better: You don't need a giant, deep AI model; a medium-sized one works best.
The final step matters: The part of the AI that turns its thoughts into a final answer needs to be deep enough to handle the complexity.

By providing this standardized tool, R2G helps the community stop arguing about which AI is best and start focusing on how to best represent the data, leading to faster and better chip designs in the future.

1. Problem Statement

The application of Graph Neural Networks (GNNs) to Electronic Design Automation (EDA) tasks, such as placement and routing prediction, has been hindered by a lack of standardized evaluation protocols. Existing benchmarks suffer from three critical issues:

Inconsistent Representations: Different datasets use disparate graph structures (e.g., netlists vs. spatial graphs) and feature sets, making it impossible to isolate whether performance gains come from better model architectures or better graph representations.
Entangled Variables: In prior works, the choice of graph view, the design stage (placement vs. routing), and the specific task are deeply entangled. Consequently, the independent effect of graph representation on model performance remains uncontrolled.
Lack of Information Parity: Existing datasets often lack "information parity," meaning different views of the same circuit do not encode the same attribute set, preventing fair comparison.

2. Methodology: The R2G Benchmark

The authors propose R2G (RTL-to-GDSII), a comprehensive benchmark suite designed to decouple representation choice from model choice.

A. Dataset Construction

Corpus: The suite includes 30 open-source IP cores (processors, DSPs, crypto cores, controllers) ranging from ~400 to ~160k gates, resulting in graphs with up to $10^6$ nodes/edges.
Pipeline: An end-to-end pipeline converts DEF (Design Exchange Format) files generated by the OpenROAD flow into graph datasets. This spans the physical design stages from synthesis through placement to routing.
Multi-View Standardization: R2G defines five complementary graph views derived from the same underlying circuit data, ensuring information parity (the same attributes are available in every view, differing only in how they are attached to nodes or edges):
1. View (b) All-elements-as-nodes: Gates, pins, nets, and IOs are all nodes. (Maximizes semantic coverage).
2. View (c) Pins-as-edges: Pins become edges between gate and net nodes.
3. View (d) Nets-as-edges: Nets become edges between gate nodes.
4. View (e) Net-Gate incidence: Bipartite formulation where net-gate membership is encoded as edges.
5. View (f) Net edges without pin nodes: Pruned pin nodes; nets are edges between gates (scalable, similar to AIG representations).

B. Task Definition

The benchmark focuses on two primary physical design tasks with stage-aware supervision:

Placement Prediction: Predicting Half-Perimeter Wirelength (HPWL) based on gate geometry.
Routing Prediction: Predicting exact routed wire length and via count based on interconnect geometry.
Feature Alignment: Features (coordinates, cell types, orientations) and labels are attached to the specific entity (node or edge) representing the net/gate in that specific view, ensuring consistent supervision granularity.

C. Experimental Setup

The authors evaluate three classic homogeneous GNN architectures (to ensure scalability and reproducibility):

GINE (Graph Isomorphism Network with Edge features)
GAT (Graph Attention Network)
ResGatedGCN (Residual Gated Graph ConvNet)
Metrics: MAE, RMSE, and Coefficient of Determination ( $R^2$ ).

3. Key Contributions

First Multi-View Benchmark: R2G is the first suite to provide five stage-aware views with information parity over a large-scale circuit corpus, enabling controlled ablation studies of graph representation.
Decoupling Representation and Model: By fixing the circuit and task while varying only the graph view, the authors isolate the impact of representation choice, a variable previously uncontrolled in EDA/Graph-ML literature.
Open-Source Pipeline: The release of a complete DEF-to-graph pipeline, unified data splits, loaders, and reproducible baselines.
Discovery of Decoder-Head Importance: The study identifies that decoder-head depth is a more critical hyperparameter than GNN backbone depth for these tasks.

4. Key Results & Findings

A. View Choice Dominates Model Choice

Magnitude of Impact: For a fixed GNN model, changing the graph view can alter the Test $R^2$ by more than 0.3.
Ranking Instability: Model rankings flip depending on the view. For example, GAT performs poorly on node-centric views but achieves its best accuracy on View (e).
Best Performing View: View (b) (All-elements-as-nodes) consistently outperforms other views across both placement and routing tasks. It provides the best balance of locality and global context.
Worst Performing View: View (f) (Net edges without pin nodes), often used for synthesis tasks, performs poorly for physical design tasks, suggesting it should not be the default for placement/routing.

B. Node-Centric vs. Edge-Centric

Node-centric views (b, c) generalize best across both placement and routing.
Edge-centric views (d, e) are competitive for routing (connectivity-driven) but generally underperform node-centric views in placement (geometry-driven).
View (e) (Incidence) showed negative $R^2$ for some models in placement, indicating a mismatch between incidence-edge supervision and node-target geometry.

C. Decoder-Head Depth is the Primary Driver

GNN Depth: Increasing the message-passing depth (3–6 layers) yields diminishing returns or even performance degradation (over-smoothing). A moderate depth of 3–4 layers is optimal.
Head Depth: Increasing the decoder-head depth from 1 to 3–4 layers transforms performance:
- Placement: $R^2$ jumps from ~0.85 (or negative for some models) to >0.99.
- Routing: Resolves numerical instability (NaNs) and achieves near-perfect predictions ( $R^2 > 0.99$ ).
Conclusion: The capacity of the prediction head is the dominant factor for accuracy, far outweighing the depth of the GNN backbone.

5. Significance and Impact

Paradigm Shift: The paper challenges the community's focus on complex GNN architectures, demonstrating that representation choice and decoder design are currently more critical levers for performance in EDA tasks.
Standardization: R2G provides a rigorous framework for future research, allowing researchers to fairly compare new models without the confounding variable of inconsistent data representations.
Practical Guidelines: The authors recommend:
- Using View (b) as the default representation for physical design.
- Using 3–4 GNN layers to avoid over-smoothing.
- Prioritizing 3–4 decoder-head layers to ensure stable training and high accuracy.
Future Directions: The benchmark opens avenues for exploring graph transformers, mixture-of-experts (MoE) architectures, and richer timing/congestion-aware tasks.

In summary, R2G establishes that in the domain of AI for EDA, the "how" of representing the circuit (the graph view) and the "how" of mapping features to targets (the decoder head) are more decisive for success than the specific choice of the GNN backbone architecture.