Hardware-Efficient Compound IC Protection with Lightweight Cryptography

1. Problem Statement

The globalized Integrated Circuit (IC) manufacturing supply chain faces severe security threats, primarily overproduction (unauthorized manufacturing by foundries) and piracy (theft of intellectual property).

• Limitations of Existing Solutions: Traditional protection methods like logic locking and hardware obfuscation often rely on non-provably secure algorithms and have been broken by SAT-based attacks, structural analysis, and removal attacks.
• Limitations of Cryptographic Approaches: Previous attempts to use standard cryptography (e.g., AES) for IC protection resulted in prohibitive hardware overhead (area, power, delay) and remained vulnerable to specific attacks (e.g., removal attacks on AES-based locking or power analysis attacks).
• Core Challenge: There is a need for a defense mechanism that offers provable security against overproduction and piracy while maintaining low hardware complexity suitable for resource-constrained environments (like IoT).

2. Methodology

The authors propose a Compound IC Protection Mechanism that integrates three distinct layers of security:

1. Double Flip Logic Locking (DFLT): Specifically using the TTLock (SFLL-HD0) technique. Unlike single-flip techniques, DFLT uses a "restore unit" to correct a specific corrupted output pattern, making it resilient to standard SAT-based attacks.
2. Lightweight Cryptography (LWC): Instead of heavy algorithms like AES, the system employs lightweight block ciphers (specifically SIMON, PRESENT, and ASCON). These ciphers encrypt the "protected input pattern" required by the DFLT restore unit.
3. LUT-Based Obfuscation: Look-Up Tables (LUTs) are used to obscure the connections between the LWC block cipher outputs and the DFLT restore unit. This prevents attackers from easily identifying the block cipher within the netlist.

The Proposed Tool (SOHNI):
The authors developed an open-source Computer-Aided Design (CAD) tool named SOHNI to automate this process. The workflow involves:

• Synthesizing the original design.
• Applying DFLT (locking specific outputs based on a pattern).
• Integrating the LWC block cipher (with fixed inputs) to generate the locking pattern.
• Applying LUT-based obfuscation to hide the cipher-restore connections.
• Performing final logic synthesis.

Proposed Attacks (To Validate Security):
To demonstrate the necessity of their compound approach, the authors introduced two new attacks against previous AES-based techniques:

• Removal Attack: Identifies the block cipher within the locked netlist, removes it, and treats its outputs as key inputs. It then uses a SAT solver to recover the original design.
• Algebraic Attack: Extracts the block cipher, formulates the key recovery as a SAT problem (using the known input/output patterns), and solves for the secret key.

3. Key Contributions

• Compound Protection Mechanism: A novel architecture combining DFLT, LWC, and LUT obfuscation to create a defense that is resilient to removal, algebraic, SAT-based, and structural analysis attacks.
• SOHNI CAD Tool: An open-source tool that automates the generation of secure ICs using various LWC algorithms (ASCON, PRESENT, SIMON) and locking techniques.
• New Attack Vectors: The introduction of the Removal Attack and Algebraic Attack, which successfully break previously proposed AES-based locking techniques (specifically those in references [8] and [9]).
• Hardware Efficiency: Demonstrating that using lightweight ciphers (like SIMON) drastically reduces area overhead compared to traditional cryptographic locking methods.

4. Experimental Results

The authors evaluated their approach using ITC'99 and EPFL benchmark circuits.

A. Hardware Complexity (Area Overhead):

• Comparison with AES: The proposed method using SIMON resulted in locked designs with significantly lower area overhead compared to AES-based techniques.
  • On large ITC'99 circuits, AES-based locking increased area by up to 11.6x compared to the proposed SIMON-based method.
  • Compared to Trivium-based locking, the overhead was up to 59.8x higher.
• Scalability: As the complexity of the original design increased, the relative area overhead of the proposed method decreased (e.g., dropping from 9.1x on small adders to 1.2x on large hyp circuits), proving high scalability.
• Cipher Efficiency: Among the tested ciphers, SIMON offered the best balance of security and hardware complexity (smallest area), followed by PRESENT and ASCON. AES was found to be the most resource-intensive.

B. Security Resilience:

• Against Proposed Attacks: The Removal Attack successfully extracted the original design from the AES-based technique (Reference [8]) but failed on the proposed SOHNI designs (marked as "NoS" - No Solution found within 3 days).
• Against Algebraic Attacks: The algebraic attack could not find the secret key for the proposed designs because the LUT obfuscation prevented the extraction of the block cipher's output pattern.
• Against SAT & Structural Attacks: The combination of TTLock (DFLT) and LUT obfuscation rendered SAT-based attacks and structural analysis attacks ineffective. The secret keys could not be recovered within the 3-day time limit.

5. Significance

This paper addresses a critical gap in hardware security by proving that provable security (via cryptography) does not have to come at the cost of hardware efficiency.

• Paradigm Shift: It moves away from "heavy" cryptography (AES) for IC protection toward "lightweight" cryptography (SIMON/ASCON) integrated with advanced logic locking.
• Robustness: The compound approach creates a "defense in depth" strategy where breaking one layer (e.g., the logic locking) does not compromise the whole system because the key generation relies on a secure, obfuscated cryptographic primitive.
• Practicality: The development of the SOHNI tool makes this advanced protection mechanism accessible to designers, facilitating the deployment of secure ICs in the IoT era where area and power are critical constraints.

In conclusion, the proposed technique successfully mitigates both overproduction and piracy with significantly lower hardware overhead than previous cryptographic methods, while remaining resilient to state-of-the-art and newly proposed attacks.