GAT-QNN: Genetic Algorithm-Based Training of Hybrid Quantum Neural Networks

1. Problem Statement

The paper addresses two critical limitations in the deployment of Hybrid Quantum Neural Networks (HQNNs) on current Noisy Intermediate-Scale Quantum (NISQ) devices:

• Backend Heterogeneity: HQNNs are often trained on a specific simulator or backend but deployed on heterogeneous environments (different simulators, compilation flows, or hardware). A circuit architecture optimized for one backend may perform poorly on another due to variations in noise, gate implementation, and compilation-induced structural changes.
• Resource Inefficiency: Deploying a full, complex "macroCircuit" is often unnecessary and costly. Smaller sub-circuits ("microCircuits") may achieve comparable or better performance with fewer gates, reducing noise exposure and runtime. However, finding these optimal sub-circuits typically requires retraining each candidate, which is computationally prohibitive.

Current methods often return a single optimized architecture for a specific setting, failing to provide a mechanism for training once and then selecting the best architecture at inference time for a specific target backend without retraining.

2. Proposed Methodology: GAT-QNN

The authors propose GAT-QNN, a two-stage framework that decouples training from deployment using Genetic Algorithms (GAs). The core concept involves a macroCircuit (a super-structure defining a large search space) and microCircuits (specific sub-architectures sampled from the macroCircuit).

A. Chromosome Encoding

Each candidate microCircuit is encoded as a fixed-length integer chromosome:

• Structure: $g = [g^{(1)}_R, g^{(1)}_C, g^{(2)}_R, g^{(2)}_C, L]$
  • $L$: Number of active layers.
  • $g^{(\ell)}_R$: Number of parameterized single-qubit rotation gates (RX) in layer $\ell$.
  • $g^{(\ell)}_C$: Number of entangling gates (CNOT) in layer $\ell$.
• Search Space: For 4-qubit experiments, gate counts range from 1–4, and depth from 1–2.

B. Stage 1: GA-Driven MacroCircuit Training

This stage trains the shared parameter pool of the macroCircuit by evolving a population of microCircuits.

1. Initialization: A population of random chromosomes (microCircuit architectures) is generated.
2. Iterative Evolution:
   • Sampling: Each chromosome instantiates a specific microCircuit from the macroCircuit search space.
   • Training: The microCircuit is trained on the task (e.g., MNIST classification).
   • Parameter Reintegration: The learned parameters from the trained microCircuit are aggregated back into the shared macroCircuit weights. This allows the macroCircuit to accumulate knowledge across diverse architectural candidates.
   • GA Operators: Standard GA operations (Parent Selection, Multi-point Crossover, Mutation) are applied to evolve the population toward higher fitness (test accuracy).
3. Outcome: A genetically optimized macroCircuit with a consolidated set of weights.

C. Stage 2: GA-Driven Inference (Deployment)

This stage selects the optimal deployment architecture without retraining.

1. Inference-Only Evaluation: Starting from the final population of the training stage, a new GA run is executed.
2. Fitness Calculation: Candidate microCircuits are constructed and evaluated using the fixed, trained macroCircuit weights. No parameter updates occur during this stage.
3. Backend-Aware Selection: The GA selects microCircuits that maximize inference-time fitness specifically on the target backend. This allows the system to adapt to backend-specific noise and compilation effects without retraining.
4. Output: A ranked set of top-performing, resource-efficient microCircuits ready for deployment.

3. Key Contributions

• GAT-QNN Framework: A novel GA-based pipeline that trains a macroCircuit by iteratively sampling, training, and reintegrating microCircuits, enabling joint exploration of architecture and parameters under NISQ constraints.
• Decoupled Training/Inference: The method separates the training phase (parameter accumulation) from the deployment phase (architecture selection). This eliminates the need to retrain models when switching backends.
• Resource-Aware Deployment: The framework naturally identifies smaller microCircuits (fewer gates) that maintain high accuracy, addressing the noise constraints of NISQ devices.
• Two-Stage Pipeline: Explicitly defines a workflow where a shared macroCircuit is trained, followed by an independent GA-driven inference run to select the best microCircuit for the specific execution environment.

4. Experimental Results

The approach was validated on a 4-class MNIST classification task using a 4-qubit HQNN.

• Performance Gains:
  • The GA-trained pipeline combined with GA-driven inference consistently outperformed regular training baselines.
  • Accuracy Improvement: Achieved 22–23% higher test accuracy across multiple backends (PennyLane, AWS Braket simulator, and QASM simulator) compared to using GA-driven inference on a conventionally trained macroCircuit.
  • Best Result: A specific microCircuit (Chromosome [3, 2, 2, 1, 2]) achieved 0.870 test accuracy using only 5 RX and 3 CNOT gates. In contrast, the full macroCircuit under regular training achieved 0.915 but required 8 RX and 8 CNOT gates; however, the GA-trained macroCircuit evaluated directly yielded only 0.780, highlighting the necessity of the inference-stage selection.
• Robustness: The performance gains were consistent across all three tested backends, proving the method's ability to handle heterogeneous execution environments.
• Efficiency: The selected microCircuits often used significantly fewer resources (gates) than the full macroCircuit while maintaining or improving accuracy.

5. Significance

• Solving the Training-Deployment Mismatch: GAT-QNN addresses the critical gap where models trained in one environment fail in another. By selecting architectures at inference time based on the target backend's characteristics, it ensures robustness without the cost of retraining.
• NISQ Compatibility: The method explicitly optimizes for shallow circuits and low gate counts, making it highly suitable for current noisy quantum hardware.
• Scalability: The approach offers a scalable path for Quantum Neural Architecture Search (QNAS) by amortizing the training cost over a shared macroCircuit, rather than training thousands of individual architectures from scratch.
• Future Impact: This work paves the way for practical, backend-agnostic quantum machine learning deployment, where a single trained model can dynamically adapt to different quantum processors or simulators by selecting the optimal sub-architecture.