Electrical Spectroscopy of Intervalley Relaxation in WSe$_2$ Transistors

This paper demonstrates that the transconductance of multilayer WSe$_2$ field-effect transistors can serve as a direct electrical spectrometer for measuring intervalley relaxation times, offering three distinct signatures—Lorentzian frequency response, two-stage current transients, and sweep-rate-proportional hysteresis—that provide quantitative access to this parameter using standard instrumentation.

The Gist

Imagine a transistor not just as a simple on/off switch for electricity, but as a busy highway with two different lanes: a "fast lane" and a "slow lane." In the material this paper studies (a type of crystal called WSe2), electrons (or rather, "holes," which act like positive charges) can travel in either of these two lanes, known as "valleys."

Usually, scientists thought these electrons switched between lanes instantly, like a car changing lanes the moment a traffic light turned green. This paper argues that in certain layers of this material, the electrons are actually a bit sluggish. They take a tiny, measurable amount of time to switch lanes. The authors have found a way to measure this "sluggishness" using standard electrical tools, without needing expensive, high-speed lasers.

Here is a breakdown of their discovery using simple analogies:

The Core Idea: The "Lane-Changing" Delay

Think of the transistor channel as a road.

• The Fast Lane (K-valley): Electrons here move quickly.
• The Slow Lane (Γ-valley): Electrons here move slowly.
• The Gate: This is the traffic controller. When you turn the gate "on," you tell the electrons to move.

In the past, scientists assumed the electrons moved to the slow lane instantly. This paper shows that if you change the traffic signal fast enough, the electrons get confused. They don't switch lanes immediately; they lag behind. This lag is called the intervalley relaxation time ($\tau_{iv}$).

The Three "Fingerprints" of the Lag

The authors predict that this delay leaves three specific "fingerprints" on the electrical current. If you see these, you know the electrons are taking their time to switch lanes.

1. The "Echo" in the Signal (Frequency Dependence)

Imagine you are shouting at a canyon. If you shout slowly, the echo comes back clearly. If you shout very fast, the echo gets muddled.

• The Experiment: The researchers wiggle the gate voltage back and forth very quickly (like a radio frequency).
• The Result: They found that the transistor's response (how much current flows) changes depending on how fast they wiggle the voltage.
• The Analogy: It's like a heavy door that takes a moment to swing open. If you push it slowly, it opens fully. If you push it back and forth super fast, it can't keep up. The paper shows that the "lag" creates a specific pattern in the electrical signal (a "Lorentzian" shape) that acts like a fingerprint, telling them exactly how long the electrons take to switch lanes.
• The Twist: For a 2-layer crystal, the "echo" goes one way; for a 3-layer crystal, it goes the opposite way. This helps prove it's a real physical effect and not just a glitch.

2. The "Overshoot" and "Undershoot" (The Step Response)

Imagine you are filling a bathtub.

• The Experiment: You suddenly turn the water tap from "off" to "full blast" (a "step" in voltage).
• The Result:
  • In the 2-layer crystal: The water level shoots up too high instantly, then slowly settles back down to the right level. This is called an overshoot.
  • In the 3-layer crystal: The water level shoots up too low instantly, then slowly climbs up to the right level. This is called an undershoot.
• Why? Because the electrons are stuck in the "fast lane" for a split second before realizing they need to move to the "slow lane." The current reacts instantly to the voltage, but the type of electron (fast or slow) takes time to adjust. This creates a two-stage reaction: a quick jump followed by a slow settle.

3. The "Hysteresis" (The Memory Effect)

Imagine walking up a hill and then walking back down.

• The Experiment: The researchers slowly turn the gate voltage up (walking up) and then slowly turn it down (walking back down).
• The Result: The current doesn't follow the exact same path up and down. It creates a loop.
• The Analogy: It's like a heavy door with a sticky hinge. When you push it open, it sticks a bit. When you pull it closed, it sticks the other way. The paper shows that the size of this "sticky loop" depends on how fast you walk (how fast you change the voltage).
• The Proof: If you walk faster, the loop gets bigger. If you walk slower, it gets smaller. This proves the "stickiness" is caused by the time it takes for the electrons to switch lanes, not by some other defect in the material.

Why This Matters (According to the Paper)

Before this paper, measuring how long it takes for electrons to switch lanes required ultrafast lasers and complex, expensive equipment found only in specialized labs. You couldn't do it with a standard multimeter or a basic radio-frequency analyzer.

This paper claims to have found a way to measure this "lane-switching time" using standard electrical tools (like lock-in amplifiers and simple voltage steps) that are already in most electronics labs.

The "Layer" Secret

The paper highlights a clever trick: by changing the number of layers in the crystal (from 2 layers to 3 layers), the direction of the effect flips.

• 2 Layers: The electrons lag in one direction.
• 3 Layers: The electrons lag in the opposite direction.

This "sign reversal" is like a signature. It proves that what they are seeing is truly about the electrons switching lanes (valley dynamics) and not just random noise or dirt on the chip (charge trapping).

Summary

The paper says: "We found that in these specific crystals, electrons are slow to switch lanes. We can see this slowness by wiggling the voltage, stepping the voltage, or walking the voltage up and down. We can measure this using normal electrical tools, and the pattern changes depending on whether the crystal has 2 or 3 layers, proving it's a real physical phenomenon."

Technical Summary

Technical Summary: Electrical Spectroscopy of Intervalley Relaxation in WSe2 Transistors

Problem Statement
Intervalley carrier distribution in multilayer semiconductors represents a slow internal degree of freedom that influences transport dynamics. In materials like tungsten diselenide (WSe2), the equilibration time between valleys ($\tau_{iv}$) is often comparable to or longer than the gate-modulation period, preventing the carrier distribution from following the gate voltage adiabatically. Historically, measuring $\tau_{iv}$ has been restricted to ultrafast optical spectroscopy, which requires complex laser infrastructure incompatible with standard cryogenic probe stations. Consequently, there is a lack of a direct, purely electrical method to spectroscopically access this internal scattering channel in standard transistor geometries.

Methodology
The authors extend the existing equilibrium valley-thermodynamics framework to the non-equilibrium regime. They introduce a single relaxation equation for the $\Gamma$-valley carrier fraction, $f_\Gamma(t)$, characterized by the intervalley relaxation time $\tau_{iv}$. This model assumes a separation of timescales where the charge relaxation time ($\tau_{RC}$) is much shorter than $\tau_{iv}$, allowing the total hole density to track the gate voltage instantaneously while the valley population lags.

The study focuses on multilayer WSe2 field-effect transistors (FETs), specifically bilayer and trilayer configurations. In these systems, the valence band maximum shifts from the $K$ point (monolayer) toward the $\Gamma$ point with increasing layer number due to interlayer coupling and spin-orbit interaction. This shift places the energy splitting $\Delta_{K\Gamma}$ near thermal energy ($k_B T$) at room temperature for bilayers, enabling gate-tunable redistribution between $K$ and $\Gamma$ valleys. The authors derive analytical expressions for the dynamic drain current and transconductance ($g_m$) under three distinct measurement conditions:

1. AC Modulation: Small-signal frequency sweeps to analyze $g_m(\omega)$.
2. Transient Response: Step changes in gate voltage to observe time-domain current relaxation.
3. DC Hysteresis: Finite-rate gate voltage sweeps to measure sweep-rate-dependent hysteresis.

Key Contributions and Results
The paper predicts three distinct, measurable electrical signatures of delayed intervalley redistribution, all of which depend quantitatively on $\tau_{iv}$:

1. Lorentzian Transconductance Spectroscopy:
   The transconductance is decomposed into a frequency-independent charge-accumulation term ($g_{m,0}$) and a valley-dependent term. The total transconductance follows a Lorentzian form:
   $$g_m(\omega) = g_{m,0} + \frac{g^0_{m,v}}{1 + i\omega\tau_{iv}}$$
   The imaginary part, $\text{Im}[g_m(\omega)]$, exhibits a peak at the characteristic frequency $\omega_c = \tau_{iv}^{-1}$. Crucially, the sign of this peak reverses between bilayer and trilayer devices due to the opposite signs of the valley susceptibility ($\chi_v$) and the mobility difference ($\Delta\mu$). This provides a direct spectroscopic readout of $\tau_{iv}$ using standard RF instrumentation.

2. Two-Stage Current Transients:
   Following a gate voltage step, the drain current exhibits a two-stage response. The charge responds instantaneously, while the valley population relaxes exponentially toward the new equilibrium.

   • Bilayer: The current shows an overshoot before relaxing to the steady state.
   • Trilayer: The current shows an undershoot.
     This layer-dependent directionality serves as a fingerprint distinguishing valley dynamics from other transient effects.

3. Sweep-Rate-Proportional Hysteresis:
   Under finite-rate gate sweeps, a hysteresis current ($\Delta I^{\text{hys}}_D$) arises proportional to the sweep rate ($r$) and $\tau_{iv}$.

   • Profile: The hysteresis profile tracks the valley susceptibility $\chi_v(V_{GS})$, activating only above the threshold voltage.
   • Sign Reversal: Similar to the AC and transient signatures, the hysteresis sign reverses between bilayer and trilayer devices.
   • Distinction: This behavior is distinct from charge-trapping hysteresis, which typically follows a logarithmic or power-law dependence on sweep rate and does not exhibit layer-number sign reversal or strict correlation with $\chi_v$.

Significance and Claims
The paper claims to provide a "direct electrical spectrometer" for intervalley relaxation time, a parameter previously accessible only via ultrafast optical techniques. By utilizing standard RF and DC instrumentation, the proposed method allows for the quantitative extraction of $\tau_{iv}$ without laser infrastructure.

The authors emphasize that the combination of layer-number sign reversal and specific gate-voltage profiles allows these valley-origin dynamics to be robustly distinguished from extrinsic effects like charge trapping or interface states. Furthermore, the method offers a pathway to determine phonon-coupling energies (specifically zone-edge phonons) through Arrhenius analysis of $\tau_{iv}$ versus temperature, purely through electrical measurements. The study suggests that reducing the device temperature shifts the spectroscopic window ($\omega_c$) into the MHz–GHz range accessible by commercial lock-in amplifiers and vector network analyzers, making this a practical tool for characterizing internal scattering channels in 2D transistors.