Technical Summary: TroPUF: Evaluating Hardware Trojan Insertion in Delay-Based Physical Unclonable Functions

1. Problem Statement

Delay-based Physical Unclonable Functions (PUFs) are widely utilized for device authentication and key generation due to their reliance on manufacturing-induced delay variations. These variations create inherent non-determinism, which is a desired security feature for generating unique device fingerprints. However, this same non-determinism creates a unique security vulnerability: it allows malicious logic (Hardware Trojans) to blend indistinguishably with normal circuit behavior.

Current research treats PUF security and Hardware Trojan detection as separate domains. PUF evaluation focuses on statistical metrics (uniqueness, reliability, uniformity, randomness) and resistance to machine learning (ML) modeling, assuming a trusted implementation. Conversely, Trojan detection typically relies on identifying anomalies in deterministic logic, structural overhead, or side-channel deviations. The critical gap identified in this work is the lack of understanding regarding the interaction between these two domains. Specifically, it remains unexplored whether a Trojan embedded directly within a delay-based PUF primitive can satisfy standard PUF functional metrics and maintain modeling resistance while dormant, thereby evading conventional validation techniques until the payload is activated.

2. Methodology

The authors propose TroPUF, a unified simulation framework designed to evaluate the insertion of hardware Trojans across multiple delay-based PUF architectures. The methodology involves a systematic comparison of "clean" PUFs against "Trojan-infected" PUFs under three distinct phases: functional analysis, structural/power analysis, and ML-based learnability analysis.

A. PUF Architectures

The framework evaluates four distinct delay-based PUF designs to assess the impact of architectural complexity:

1. Single Arbiter PUF (SA-PUF): A baseline linear architecture vulnerable to modeling attacks.
2. Feedforward Arbiter PUF (FA-PUF): Introduces stage-level dependency to break linear separability.
3. XOR Arbiter PUF (XA-PUF): Combines multiple independent arbiter chains via bitwise XOR to increase nonlinearity.
4. Obfuscated Composite Feedforward XOR Interpose Arbiter PUF (OA-PUF): A hierarchical, highly complex design combining feedforward and interpose structures.

B. Trojan Models

The study implements manually designed Trojans with varying trigger mechanisms and payload types:

• Triggers:
  • Sequential: Activates after a specific ordered sequence of challenges.
  • Counter: Activates after a predefined number of start pulses (event count).
  • Hash: Activates when an XOR-based hash of the challenge matches a target value.
• Payloads:
  • Bias Injection: Forces the PUF output to a fixed logic value.
  • Freeze Output: Stores and replays the first valid response, eliminating challenge-dependent variability.

C. Experimental Setup

Experiments were conducted using a unified Verilog testbench and RTL simulation.

• Functional Metrics: Uniqueness, reliability, uniformity, and randomness were calculated using Python scripts on simulation logs.
• Synthesis Analysis: Designs were synthesized in Vivado to measure Lookup Table (LUT) utilization, Flip-Flop (FF) utilization, and total on-chip power.
• ML Modeling: Logistic regression models were trained on 50,000 Challenge-Response Pairs (CRPs) to evaluate prediction accuracy. The study distinguishes between the dormant state (pre-trigger) and the triggered state (post-activation).

3. Key Results

A. Functional Metrics

• Dormant State: Trojan-infected PUFs in the dormant state were statistically indistinguishable from clean PUFs. All architectures maintained near-ideal uniqueness (50%), perfect reliability (100%), balanced uniformity (50%), and high randomness (>99%).
• Triggered State: Upon activation, all architectures exhibited immediate and severe degradation. Uniqueness dropped to near 0%, reliability fell to ~50%, uniformity shifted to extreme bias (>99%), and randomness collapsed to near 0%.
• Conclusion: Structural complexity (e.g., OA-PUF) did not prevent post-activation degradation, nor did it mask the dormant state's conformity to standard metrics.

B. Structural and Power Analysis

• Resource Overhead: The insertion of Trojan logic (triggers and payloads) resulted in minimal increases in LUT and FF utilization. In complex architectures, the relative overhead was even less perceptible.
• Power Consumption: Dormant Trojan logic did not produce a distinguishable power signature. Incremental consumption was masked by the inherent switching activity of the PUF circuitry, particularly in designs with higher activity.
• Conclusion: Conventional structural and side-channel (power) validation techniques failed to detect the presence of dormant Trojans.

C. ML Modeling Resistance

• Dormant State: Both clean and Trojan-infected (dormant) PUFs exhibited prediction accuracies around 50% (random guessing) when subjected to logistic regression. The presence of dormant malicious logic did not alter the learnability of the PUF.
• Triggered State: Once activated, prediction accuracy for all architectures surged to >99%. The payload rendered the PUF responses deterministic and highly predictable.
• Conclusion: Modeling resistance is preserved in the dormant state, meaning ML-based detection methods cannot distinguish a Trojan-infected PUF from a clean one prior to activation.

4. Key Contributions

1. Unified Framework: Development of TroPUF, the first framework to analyze hardware Trojan insertion directly within delay-based PUF primitives across multiple architectures and Trojan types.
2. Integrated Evaluation: Simultaneous assessment of functional metrics, hardware overhead, and ML modeling resistance, revealing that these metrics are insufficient for detecting embedded Trojans in their dormant state.
3. Security Gap Identification: Demonstration that satisfying conventional PUF metrics (uniqueness, reliability, etc.) and modeling resistance does not guarantee the integrity of the security primitive when malicious logic is embedded within it.

5. Significance and Claims

The paper claims that the current trust model for hardware security primitives is fundamentally flawed when applied to PUFs. The authors argue that the very characteristics that make PUFs effective (intrinsic process variation and non-determinism) also enable them to conceal malicious logic.

The primary significance of this work is the exposure of a "blind spot" in hardware security:

• Conventional validation fails: Standard functional, structural, and ML-based validation techniques cannot detect a Trojan embedded in a PUF before the trigger condition is met.
• Coupled Security Problem: PUFs and Hardware Trojans must be evaluated as a coupled security problem rather than independent entities.
• Risk of Root of Trust Compromise: Since PUFs often serve as root-of-trust primitives, a compromised PUF undermines all higher-level security mechanisms dependent on it, potentially enabling attacks across entire platforms.

The authors conclude that new detection strategies must move beyond current assumptions of deterministic logic and address the specific challenge of malicious logic embedded directly within the security primitive itself.