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Bit-Accurate FPGA Evaluation of Learned Feature Gating in a Fixed-Point Fourier-Feature Automatic Modulation Classifier

This paper presents a bit-accurate FPGA evaluation demonstrating that learned feature gating, despite increasing hardware resource usage and latency, fails to improve classification accuracy over ungated fixed-point models in an automatic modulation classifier.

Original authors: Gawthaman Senthilvelan, Luthira Abeykoon

Published 2026-07-28
📖 6 min read🧠 Deep dive

Original authors: Gawthaman Senthilvelan, Luthira Abeykoon

Original paper licensed under CC BY 4.0 (http://creativecommons.org/licenses/by/4.0/). This is an AI-generated explanation of the paper below. It is not written or endorsed by the authors. For technical accuracy, refer to the original paper. Read full disclaimer

Imagine you are a radio detective trying to identify a secret message hidden in a static-filled radio wave. The message could be a whisper, a shout, a Morse code tap, or a complex digital chirp, but you don't know which one it is. This is the job of Automatic Modulation Classification (AMC). In the real world, this helps radios know how to talk to each other, helps police monitor the airwaves, and lets military gear recognize friend from foe. Usually, computers do this by listening to the wave and running a "brain" (a neural network) to guess the type. But what if you need this detective to work inside a tiny, super-fast chip called an FPGA? These chips are like custom-built logic machines that can be reprogrammed to do specific math tasks incredibly fast, but they have a strict budget for space and energy.

Now, imagine you have a smart assistant who can look at the clues and say, "Hey, ignore that noisy part of the signal, it's useless; focus only on the important bits!" In software, this "feature gating" is a popular trick to make AI smarter. But in the rigid world of hardware, every extra calculation costs real estate on the chip and takes time. The big question this paper asks is: Is this smart assistant worth the extra cost when the detective is already working inside a tiny, fixed-point chip? The authors built a super-compact radio detective using a specific set of 32 clues (a mix of frequency and statistical patterns) and tested two versions: one with the "smart assistant" (the gate) and one without. They ran this on a real physical board, not just a computer simulation, to see if the extra brainpower actually helped or just made the machine slower and bigger.

The Experiment: A Tale of Two Detectives

The researchers set up a race between two versions of a radio classifier. Both detectives start with the same raw material: a short burst of radio signal containing 128 samples. Before the detective even looks at the signal, a host computer cleans it up and turns it into a fixed-point number (a specific way of handling decimals that chips love).

The detectives then extract 32 clues from this signal. Think of these clues as a summary report: 24 clues tell the detective about the energy in different frequency bins (like checking how loud the radio is at different pitches), and 8 clues tell them about the shape and rhythm of the wave (like checking if the signal is spinning or wiggling in a specific way).

The Two Contenders:

  1. The "Ungated" Detective: This detective takes the 32 clues and immediately feeds them into a small neural network (a 32-to-128-to-11 brain) to make a guess. It's lean, mean, and fast.
  2. The "Gated" Detective: This detective has an extra step. Before feeding the clues to the brain, it runs them through a "gate." This gate is a learned filter that tries to decide, for this specific signal, which clues are important and which should be turned down. It multiplies the clues by a number between 0 and 1 to dim the noise and boost the signal.

The researchers trained both detectives using two different methods: one where they just converted the software to hardware math later (PTQ), and one where they trained the hardware math directly (QAT). They did this twice with different random starting points (seeds) to make sure the results weren't just a fluke. Then, they loaded all 8 versions onto a real Intel Cyclone V FPGA board and ran them against 352,000 different radio signals.

The Results: The Gate Was a Burden, Not a Boost

The outcome was surprisingly clear and a bit counterintuitive for AI fans. The detective without the gate won every single time.

In all four matched comparisons (different training seeds and math methods), the "Ungated" detective was more accurate.

  • When using the standard conversion method (PTQ), the gated version was 0.784 percentage points less accurate on average.
  • When using the hardware-aware training (QAT), the gated version was 0.616 percentage points less accurate.

It turns out that for this specific type of compact detective, the "smart assistant" didn't know anything the main brain didn't already know. The 32 clues were already so compressed and specific that the gate couldn't find any new way to improve them. Instead of helping, the gate just got in the way.

The Cost of the Gate
The paper measured exactly what the gate cost the hardware. Adding this "smart assistant" wasn't free:

  • It added 1,318 logic blocks (ALMs).
  • It added 1,557 memory registers.
  • It used 4 extra digital signal processing (DSP) blocks.
  • It made the detective take 3,140 extra clock cycles to finish a job.

At a speed of 50 MHz, that extra time added about 62.80 microseconds to the delay. While that sounds tiny, in the world of high-speed radio, every microsecond counts, and every extra block of logic is a piece of the chip that can't be used for something else.

The Verdict

The researchers also checked their work with extreme precision. They ran the FPGA predictions against a separate, independent computer program that did the exact same math. All 352,000 predictions matched perfectly. They even checked 3,760 intermediate steps (like the values inside the gate) and those matched too. This proves the hardware was doing exactly what the math said it should.

The study concludes that for this specific setup—using 32 Fourier and statistical features on a fixed-point FPGA—adding a learned feature gate is a bad trade. It increases the hardware cost and slows down the processing without making the classification any better. In fact, it made it slightly worse.

The authors suggest that the "gate" might be useful if the input data were much larger or more complex, but for this compact, pre-processed summary of a radio signal, the extra layer of complexity just wasn't worth the price. The lesson here is that in hardware design, sometimes the simplest path is the smartest one, and adding a "smart" layer doesn't always make the system smarter.

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