Function Recognition from Raw Power Side Channels in Bare-Metal Embedded Systems: Feasibility and Limits

Technical Summary: Function Recognition from Raw Power Side Channels in Bare-Metal Embedded Systems

Problem Statement
Bare-metal microcontrollers, particularly ARM Cortex-M variants, are foundational to resource-constrained IoT, industrial, and cyber-physical systems. However, their lack of operating-system-level instrumentation creates a significant blind spot for runtime security monitoring. While memory-related C functions (e.g., memcpy, memset) are frequent vectors for security weaknesses, observing their execution does not inherently prove an invocation is malicious. The core research question addresses whether selected security-relevant C functions can be recognized directly from raw power traces in continuous, unmodified bare-metal workloads, without software instrumentation or engineered spectral features. The study seeks to determine both the feasibility of this approach and the physical limits of what can be distinguished from the exposed signals.

Methodology
The authors investigated this problem using an ARM Cortex-M4-K82F platform with power acquisition performed via a ChipWhisperer Lite oscilloscope. The experimental setup involved:

• Data Acquisition: Traces were collected at 8 MHz (matching the CPU frequency) with randomized function inputs to capture parameter-dependent variations. Binaries were compiled at -O0 to maintain explicit function boundaries.
• Dataset Construction: 2,700 traces per function were generated, segmented into fixed-size windows (primary configuration: 50 samples) with varying overlaps. A balanced dataset of 140,000 windows was created, partitioned at the raw-trace level to prevent data leakage.
• Architectural Comparison: The study compared three distinct approaches:
  1. Transformer-based Sequence Classification: A shared autoencoder rejection stage followed by a Transformer encoder.
  2. LSTM-based Sequence Classification: Stacked LSTM layers, tested both standalone and with a shared rejection stage, including a "Mixed" class to handle function boundaries.
  3. Parallel Class-Specific Autoencoders: The primary proposed method. Instead of a single multi-class classifier, this architecture trains one autoencoder per target function. Each model learns the reconstruction distribution of a single function's power signature. During inference, a window is accepted only if its reconstruction error falls below a function-specific threshold; otherwise, it is rejected as out-of-distribution.

Key Contributions

1. Raw-Power Function Recognition: The authors demonstrate the recognition of selected C functions directly from fixed-size raw power windows in continuous workloads, eliminating the need for spectral feature engineering or workload modification.
2. Class-Specific Reconstruction: The study introduces and validates a parallel architecture of class-specific autoencoders. This approach outperforms sequence-classification baselines by allowing unrelated workload segments to be rejected rather than forcibly classified into a known category.
3. Characterization of Physical Limits: The research empirically characterizes the limits of observability, showing that recognition difficulty is not solely a model capacity issue but is constrained by the information content of the physical signal itself.

Results
The evaluation was conducted on independent continuous workloads (W1–W20) designed to exercise common embedded software weaknesses (e.g., buffer overflows, signed-to-unsigned conversion errors).

• Seven-Function Set: When evaluating all seven target functions (memcpy, memset, memmove, strncpy, strncat, malloc, strcpy), all architectures struggled with high false-positive rates (FPR). The parallel autoencoder achieved the lowest FPR (52.49%) but still failed to reliably separate all signatures.
• Five-Function Set: Excluding malloc and strcpy, the parallel class-specific autoencoder achieved the best operating point: 96.00% True Positive Rate (TPR) and 4.00% False Negative Rate (FNR) at a 39.79% FPR.
  • The Transformer baseline reached 90.00% TPR at 44.95% FPR.
  • The best LSTM configuration reached 100% TPR but at a significantly higher 59.38% FPR.
• Signal Limits: Two specific functions proved consistently difficult across all architectures:
  • malloc: Exhibited a near-invariant execution profile (~166 cycles) regardless of allocation size, providing insufficient intra-function signal variation.
  • strcpy: Showed high inter-function similarity to memcpy and other memory-transfer operations, creating ambiguity in raw power windows.
• Acquisition Parameters: Increasing the sampling rate to 4× CPU frequency or increasing window size to 200 samples did not improve recognition performance, suggesting the limitations are inherent to the signal information rather than the acquisition resolution.
• Cross-Platform Validation: A contextual evaluation on a Cortex-M4-F303 confirmed the method could be retrained on a different board, achieving 100% TPR but maintaining a 33.35% FPR, with precision varying significantly by function (6.25% to 50%).

Significance and Claims
The paper concludes that raw-power function recognition is feasible as an independent behavioral signal for monitoring resource-constrained embedded systems, but it is not a standalone vulnerability detector.

• Behavioral Signal vs. Security Detector: The authors emphasize that recognizing a function execution does not establish that the invocation is unsafe or malicious. Instead, the approach provides an external behavioral signal that can complement software-derived evidence in a multi-stage monitoring architecture.
• Physical Observability Limits: The study establishes that the distinguishability of function signatures is bounded by the physical information exposed by the specific hardware, compiler, and library implementation. The persistent difficulty with malloc and strcpy suggests that no amount of model capacity can overcome insufficient or overlapping physical information.
• Deployment Reality: The authors remain modest about immediate deployment, noting that high false-positive rates and function-dependent precision preclude standalone alerting. Trustworthy deployment requires further work on reducing false positives and establishing robustness across compiler optimizations, environmental conditions, and hardware platforms.

In summary, the work defines the boundary of what raw power side channels can reveal: they can expose security-relevant software behavior without relying on the monitored software stack, but their utility is strictly limited to specific functions and operating conditions where the physical evidence remains distinguishable.