Buffer-less Gallium Nitride High Electron Mobility Heterostructures on Silicon

Technical Summary: Buffer-less Gallium Nitride High Electron Mobility Heterostructures on Silicon

Problem Statement
The heteroepitaxial integration of III-nitride semiconductors on silicon substrates is hindered by significant lattice (≈19%) and thermal expansion (≈50%) mismatches. Conventional GaN-on-Si High Electron Mobility Transistor (HEMT) designs rely on thick, compositionally graded AlGaN or AlN/GaN superlattice buffers to manage stress and filter threading dislocations (TDs). However, these buffers introduce substantial thermal resistance due to alloy and interface scattering, severely limiting heat extraction. This thermal bottleneck degrades device efficiency, increases failure rates, and forces commercial GaN-on-Si devices to be derated by an order of magnitude compared to SiC-based counterparts. Furthermore, the growth of these thick buffers increases manufacturing time, energy consumption, and material costs, contradicting sustainability goals.

Methodology
The authors propose a "buffer-less" approach, directly growing GaN on a thin AlN nucleation layer (NL) on silicon using Metal-Organic Vapor Phase Epitaxy (MOVPE). The core methodology involves modulating the reactor pressure ($P_g$) during GaN growth to control stress evolution and defect formation without intermediate buffer layers.

• Growth Strategy: The AlN NL thickness was fixed at ≈150 nm to balance dislocation density reduction against cracking risks. The GaN layer thickness was designed to be ≈750–800 nm (total epi-thickness ≤1 µm) to optimize thermal performance while maintaining stress management.
• Stress Modulation: Reactor pressure was varied over an order of magnitude (18 to 200 Torr) to alter the growth mode. In-situ wafer curvature monitoring and reflectance transients were used to track stress evolution and surface coalescence in real-time.
• Characterization: Structural quality was assessed via High-Resolution X-Ray Diffraction (HRXRD), Scanning Electron Microscopy (SEM), and Atomic Force Microscopy (AFM). Thermal resistance was measured using nanosecond transient thermoreflectance (TTR). Electronic properties were evaluated through room-temperature Hall-effect measurements and low-temperature (1.8 K) magneto-transport analysis.

Key Results

1. Stress and Structural Control: By reducing reactor pressure, the authors successfully induced a compressive growth regime from the onset of GaN deposition, counteracting the tensile stress that typically causes cracking during cooldown. A pressure of 75 Torr yielded a mean compressive stress of (-0.90 ± 0.01) GPa, sufficient to prevent cracking and maintain a wafer bow of (48 ± 10) µm, meeting CMOS fab requirements.
2. Defect Density: The buffer-less structures achieved threading dislocation densities (TDD) of (3.4 ± 0.9) × 10⁹ cm⁻², comparable to state-of-the-art thick-buffered structures. The reduction in TDD at higher pressures was attributed to a delayed island coalescence mechanism that facilitates dislocation bending rather than climb.
3. Thermal Performance: The removal of thermally resistive buffers resulted in a GaN-to-substrate thermal resistance of (11 ± 4) m² K GW⁻¹. This represents an order-of-magnitude reduction compared to conventional GaN-on-Si designs and is among the lowest values reported for heteroepitaxial GaN on any non-native substrate.
4. Electronic Properties: AlGaN/AlN/GaN heterojunctions grown on these templates exhibited high-quality 2D Electron Gases (2DEG).
   • Room Temperature: Hall mobility exceeded 2000 cm²/V·s with carrier densities up to 9.6 × 10¹² cm⁻², rivaling the best-reported values for GaN-on-Si, including those with thick buffers.
   • Low Temperature: The 2DEG displayed clear Shubnikov-de-Haas (SdH) oscillations, indicating high quantum quality. The quantum lifetime was measured at >0.180 ps, and signatures of spin-splitting (Rashba effect) were observed, confirming the high crystalline quality and strong confinement of the channel.

Significance and Claims
The paper claims to establish a new paradigm for nitride HEMTs by demonstrating that thick, thermally resistive buffers are not indispensable for high-performance GaN-on-Si integration. By bypassing the buffer layer, the authors achieve a simultaneous optimization of structural integrity, thermal extraction, and electronic mobility.

The significance of this work lies in:

• Thermal Efficiency: Providing a pathway to significantly lower channel temperatures, potentially unlocking the full power density potential of GaN HEMTs on silicon.
• Manufacturing Viability: Reducing growth time, energy consumption, and material usage, aligning with greener manufacturing objectives.
• Scientific Platform: Offering a scalable, industrially relevant platform for fundamental investigations into electron dynamics, spin-splitting, and mesoscopic physics in 2D wide-bandgap systems, previously restricted to bulk or expensive substrates like SiC and sapphire.

The authors conclude that this approach paves the way for lower-cost, sustainably produced GaN-based heterostructures suitable for next-generation energy-efficient transistors and novel quantum devices.