🔬 applied physics

SEMIDV: A Compact Semiconductor Device Simulator with Quantum Effects

This paper introduces SEMIDV, a compact semiconductor device simulator featuring a Python interface that integrates localization landscape theory for quantum corrections and a ballistic mobility model to analyze and propose ultra-short-channel transistors down to 4.5 nm.

Original authors: Chien-Ting Tung

Published 2026-04-28

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CC BY 4.0

Original authors: Chien-Ting Tung

Original paper licensed under CC BY 4.0 (http://creativecommons.org/licenses/by/4.0/). ✨ This is an AI-generated explanation of the paper below. It is not written or endorsed by the authors. For technical accuracy, refer to the original paper. Read full disclaimer

Imagine you are trying to predict how water flows through a very complex, tiny plumbing system. In the world of computer chips, this "water" is electricity (electrons), and the "plumbing" is a semiconductor device like a transistor.

For years, engineers have used a set of rules called the "Drift-Diffusion" model to predict this flow. Think of this model like a map for a slow-moving river. It works great for large, wide rivers (older, bigger transistors). But as chip makers shrink transistors down to the size of a few atoms (nanometers), the river becomes a narrow, turbulent stream where the old map fails. The water starts behaving like a wave rather than a fluid, and it can "jump" over obstacles without hitting them.

This paper introduces a new tool called SEMIDV, a simulator designed to handle these tiny, tricky rivers. Here is how it works, broken down into simple concepts:

1. The New Map: "Localization Landscape"

The biggest problem with tiny transistors is that electrons get "quantum confined." Imagine trying to park a car in a garage that is only slightly wider than the car itself. The car (electron) can't just sit anywhere; it's forced into a specific spot in the middle, and it can't touch the walls.

Old simulators tried to guess where the car would sit using rough approximations. SEMIDV uses a new method called Localization Landscape Theory.

The Analogy: Imagine you have a bumpy landscape (the inside of the transistor). Instead of trying to calculate every single wave the electron makes, this theory solves a simpler equation to find the "deepest valley" where the electron naturally wants to settle. It finds the exact spot the electron will occupy without needing to run a super-slow, complex calculation. It's like using a GPS that instantly finds the perfect parking spot without needing to drive the car around first.

2. The "Super-Runner": Ballistic Transport

In normal-sized transistors, electrons bump into atoms constantly, like a runner tripping over hurdles in a crowded stadium. This slows them down.
In ultra-small transistors, the track is so short that the runner can sprint from the start line to the finish line without tripping once. This is called ballistic transport.

The Analogy: If a long-distance runner (long-channel transistor) has to weave through a crowd, they move slowly. But if the track is only a few steps long (nanoscale), they can sprint at full speed before they even realize they need to slow down.
The Result: SEMIDV includes a special "mobility model" that accounts for this sprinting. It realizes that in these tiny devices, electrons can move much faster than usual, a phenomenon called velocity overshoot.

3. Testing the Tool: The 6nm "Ribbon"

The author tested SEMIDV on a modern transistor design called a Nanosheet FET (specifically a RibbonFET with a 6-nanometer gate).

What they found: When they turned on the quantum corrections (the "parking spot" finder), the electrons stopped hugging the walls of the channel and moved to the center. This changed how much electricity the device could hold (capacitance).
The Surprise: Because the electrons were sprinting so fast (ballistic transport), the amount of electricity stored near the drain (the exit) dropped significantly. This is a big deal because standard computer models assume a certain amount of storage, but in these tiny chips, that storage is actually much lower.

4. Pushing the Limits: The 4.5nm Dream Transistor

Finally, the author used SEMIDV to design a hypothetical, even smaller transistor with a gate length of just 4.5 nanometers.

The Tweaks: To make this work, they made the channel thinner and used a special material trick (simulating "negative capacitance") to make the electrical gate stronger.
The Outcome: This tiny design could run on a very low voltage (0.45 Volts) while still switching fast.
The Catch: While the "sprint" (saturation current) was faster, the "walking" (linear current) was a bit slower because the channel was so thin that electrons got bumped around more easily. However, the overall speed and efficiency were promising.

The Bottom Line

The paper presents SEMIDV as a compact, easy-to-use software tool that helps engineers understand the wild behavior of electrons in the tiniest transistors. By using a clever new math trick (Localization Landscape) to find where electrons hide, and by accounting for their "sprinting" speed, the simulator offers a clearer picture of how future chips will behave. It suggests that we can keep shrinking transistors down to 4.5 nanometers and run them on very low power, provided we account for these quantum quirks.

1. Problem Statement

As semiconductor technology scales into the nanometer regime (e.g., gate lengths $\le$ 6 nm), traditional Device TCAD (Technology Computer-Aided Design) tools face significant limitations:

Inadequacy of Drift-Diffusion (DD): The standard DD transport equation fails to capture critical quantum effects (such as quantum confinement) and quasi-ballistic transport phenomena (like velocity overshoot) that dominate in short-channel devices.
Computational Cost of Rigorous Methods: While methods like the Schrödinger equation solver or Non-Equilibrium Green's Function (NEGF) are accurate, they are computationally prohibitive for large-scale device simulation and design optimization.
Approximation Limitations: Existing quantum corrections (e.g., van Dort model, Density Gradient model) rely on macroscopic approximations or fitting parameters rather than directly solving the underlying quantum mechanics, often lacking accuracy or requiring extensive calibration.
Mobility Modeling: Standard mobility models struggle to accurately predict the ballistic length dependence and velocity overshoot effects in ultra-short channels without complex parameter tuning.

2. Methodology

The author presents SEMIDV, an open-source, Python-based compact semiconductor device simulator. The tool is built on a finite-difference Poisson-Drift-Diffusion framework but introduces novel algorithms to address the limitations mentioned above:

Localization Landscape (LL) Theory for Quantum Corrections:
- Instead of solving the full time-independent Schrödinger equation (which is expensive) or using empirical quantum potentials, SEMIDV employs Localization Landscape Theory.
- This approach solves a linear differential equation (Eq. 18 in the paper) to directly obtain the ground state energy.
- The resulting "quantum potential" ( $\Lambda$ ) is added to the conduction/valence band edges in the carrier density calculation (Eq. 19), effectively correcting the DD equation for quantum confinement without iterative eigenvalue solvers.
Compact Mobility and Transport Models:
- Ballistic Mobility: An empirical ballistic mobility model is integrated to calculate transmission rates based on channel length.
- Velocity Overshoot: A re-derived physical model for velocity saturation ( $v_{sat}$ ) is implemented. It accounts for the reduced probability of optical phonon scattering in short channels, allowing the drain-end velocity to exceed the long-channel saturation limit.
- Standard Models: The simulator retains standard models for low-field mobility (phonon and Coulomb scattering) and high-field saturation (Caughey-Thomas model).
Numerical Framework:
- The solver uses Gummel iteration to self-consistently solve the coupled Poisson and Continuity equations.
- Slotboom variables are used for the continuity equations to ensure numerical stability, particularly in heterojunctions.
- The code is fully integrated with the Python environment for easy scripting, visualization, and data analysis.

3. Key Contributions

First TCAD Implementation of LL Theory: The paper introduces Localization Landscape Theory to the TCAD community as an efficient, highly accurate method for quantum corrections, bridging the gap between the speed of DD and the accuracy of Schrödinger solvers.
Unified Compact Model: It develops a cohesive framework that simultaneously handles quantum confinement (vertical and lateral) and quasi-ballistic transport (velocity overshoot) within a single DD-based simulator.
Open-Source Tool: SEMIDV is released as an open-source Python tool, lowering the barrier to entry for researchers studying nanoscale device physics.
Design Exploration: The paper provides a concrete design case study for an ultra-short-channel transistor, demonstrating how the simulator can guide device scaling.

4. Results

The simulator was validated and applied to a 6 nm Gate-All-Around (GAA) / RibbonFET (calibrated against Intel data) and a proposed 4.5 nm transistor:

Calibration & Validation:
- SEMIDV successfully reproduced the $I-V$ characteristics of a 6 nm RibbonFET.
- Quantum Confinement: Simulations showed that without quantum correction, electrons accumulate at the surface. With LL theory, electrons are confined to the channel center, matching Schrödinger equation results. This confinement reduces the effective gate capacitance ( $C_{ggi}$ ).
- Velocity Overshoot: The model predicted a peak velocity of $3.57 \times 10^7$ cm/s and an injection velocity of $1.38 \times 10^6$ cm/s, aligning with reported experimental data.
- Capacitance Anomaly: The study revealed that in quasi-ballistic regimes, the saturation gate capacitance ( $C_{ggi}$ at $V_{dsat}$ ) can drop significantly (to less than 2/3 of the linear region capacitance) due to high drain velocities and reduced charge accumulation, challenging traditional compact model assumptions.
Ultra-Short-Channel Design (4.5 nm):
- A new transistor design was proposed with a 4.5 nm gate length and 2.5 nm channel thickness.
- To compensate for mobility degradation from thinning, the design utilized a ferroelectric superlattice concept to achieve an Equivalent Oxide Thickness (EOT) of 3.5 Å (simulated by adjusting dielectric constants).
- Performance: The 4.5 nm FET exhibited improved Subthreshold Swing (SS) and Drain-Induced Barrier Lowering (DIBL) compared to the 6 nm baseline.
- Low Voltage Operation: The device was shown to operate effectively at a supply voltage ( $V_{dd}$ ) of 0.45 V, with an estimated intrinsic delay of 0.25 ps and switching energy of 0.9 pJ/m.

5. Significance

This paper is significant for several reasons:

Efficiency vs. Accuracy: It demonstrates that Localization Landscape Theory offers a "sweet spot" for device simulation, providing quantum-accurate results at a computational cost comparable to classical DD simulations.
Modeling Insights: The findings regarding the reduction of gate capacitance in the saturation region due to velocity overshoot highlight a critical gap in current compact models used for circuit design, suggesting that future IC designs may need revised models for ultra-scaled nodes.
Future Roadmap: The successful simulation of a 4.5 nm device operating at 0.45 V provides a theoretical pathway for extending Moore's Law beyond current physical limits, showing that aggressive scaling of channel thickness and EOT (via ferroelectrics) can maintain performance despite mobility degradation.
Accessibility: By providing an open-source Python tool, SEMIDV enables rapid prototyping and educational exploration of next-generation semiconductor physics without the need for expensive commercial TCAD licenses.