Reproducibility and variability in commercial SiC MOSFETs at deep-cryogenic temperatures

This study reveals that commercial SiC MOSFETs exhibit significant performance degradation, including gate hysteresis and threshold voltage shifts, at deep-cryogenic temperatures (down to 650 mK), suggesting that carrier freeze-out and high interface trap density may hinder their reliability for quantum electronics and cryo-CMOS applications.

The Gist

Imagine you have a very tough, high-performance truck engine (Silicon Carbide, or SiC) that is famous for working in extreme heat and heavy loads. Recently, scientists have been wondering if this same tough engine could also be used to power the delicate, ultra-sensitive computers of the future: quantum computers.

Quantum computers are like incredibly fragile glass sculptures; they need to be kept in a deep freeze (near absolute zero) to stop them from shattering due to heat. The researchers in this paper decided to take these commercial SiC truck engines and put them in a deep-freeze lab to see if they could run smoothly in that environment.

Here is what they found, explained simply:

1. The "Freeze" Problem

When they cooled the chips down from room temperature to near absolute zero (colder than outer space!), the engines didn't just get quieter; they started acting strangely.

• The Analogy: Think of the electrical signals inside the chip like cars driving on a highway. At room temperature, the traffic flows smoothly. At deep-freeze temperatures, it's as if the cars have frozen in place, and the road has become covered in thick ice. The "traffic" (electrons) gets stuck, and the engine struggles to start or stop on command.

2. The "Sticky" Switch (Hysteresis)

One of the main things they tested was the "threshold voltage"—basically, how much push (voltage) you need to turn the switch on.

• The Finding: At cold temperatures, the switch became "sticky." If you pushed it to turn it on, it didn't just stay on; it remembered where you pushed it from before.
• The Analogy: Imagine a door with a very sticky hinge. If you push it open, it doesn't just stay open; it wants to snap back or stay stuck depending on how hard you pushed it last time. This "memory" (called hysteresis) makes it very hard to know exactly what state the computer is in, which is a disaster for a machine that needs to be precise.

3. The "Ghost" Traffic Jams (Variability)

The researchers tested two identical chips, hoping they would behave exactly the same.

• The Finding: At room temperature, they were twins. But in the deep freeze, they started acting like strangers. One chip needed a little more push to turn on, while the other needed less.
• The Analogy: It's like buying two identical pairs of shoes. At room temperature, they fit perfectly. But if you put them in a freezer, one shrinks a tiny bit and the other stretches. You can't rely on them to fit the same foot anymore. This "variability" means you can't mass-produce these chips for quantum computers because you can't predict how each one will behave.

4. The "Ice Block" Contacts

The metal parts where electricity enters and leaves the chip (the contacts) also froze up.

• The Finding: Instead of being smooth, open gates, they turned into "Schottky barriers," which act like one-way valves that are hard to open.
• The Analogy: Imagine trying to pour water through a funnel. At room temperature, the funnel is wide open. In the deep freeze, the funnel gets clogged with ice, and you have to push with massive force just to get a few drops through. This makes the chip very inefficient and hard to control.

5. The "Training" Routine

The chips were also unstable over time. If you left them sitting, their performance would drift.

• The Finding: The researchers had to "train" the chips by running them through a specific routine of turning them on and off repeatedly before they could take accurate measurements.
• The Analogy: It's like warming up a car engine in winter. If you try to drive immediately, it sputters. You have to let it idle and rev a few times to get the oil moving and the engine running smoothly. The chips needed this "warm-up" (or training) to stop drifting.

The Bottom Line

The paper concludes that while Silicon Carbide is a great material for high-power electronics (like electric cars or power grids), it is currently not ready for quantum computers.

The "deep freeze" causes too many problems: the switches get sticky, the chips act differently from one another, and the electrical connections get clogged with "ice." Before these chips can be used for quantum technology, the material scientists need to fix the "ice" issues (specifically the interface traps and contact problems) to make the chips reliable at near-zero temperatures.

Technical Summary

Technical Summary: Reproducibility and Variability in Commercial SiC MOSFETs at Deep-Cryogenic Temperatures

Problem Statement
Silicon carbide (SiC) is a wide-bandgap semiconductor widely used in high-power and harsh-environment electronics, with an emerging CMOS technology platform. Recently, SiC has attracted interest for quantum technologies due to crystal defects that can function as spin-based qubits or single-photon sources. While current quantum state addressing in SiC relies on optical scanning of barely processed wafers, integrating SiC CMOS transistor technology for quantum state control and readout could enable industry-compatible integrated quantum electronics. A critical prerequisite for this integration is the evaluation of SiC Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) at cryogenic temperatures. Reliable quantum readout and control electronics require specific performance metrics: high-quality ohmic contacts (contact resistance $\le$ 1 k$\Omega$), sharp channel gating (subthreshold swing $\approx$ 8 mV/dec), and high reproducibility/stability (parameter spread $\le$ 1%). This work assesses whether current commercial SiC power MOSFETs meet these criteria at deep-cryogenic temperatures.

Methodology
The study characterizes two nominally identical commercial vertical n-channel 1.2 kV 4H-SiC MOSFETs (Wolfspeed CPM3-1200-0013A) over a temperature range from 300 K down to 650 mK. The devices were mounted on a dilution refrigerator mixing chamber plate. To ensure statistical robustness, the authors acquired at least 50 repeated $I_D$-$V_G$ transfer characteristics for each device at every temperature point.

Key experimental protocols included:

• Variable Drain Bias: Due to the emergence of Schottky-like behavior at source/drain contacts at low temperatures, the drain-source voltage ($V_{DS}$) was increased as temperature decreased to maintain transistor conduction.
• Parameter Extraction: Threshold voltage ($V_{th}$) was extracted via linear extrapolation from the point of maximum transconductance ($g_{m,max}$). Subthreshold swing (SS) was calculated using the inverse gradient of log-linear characteristics at two fixed current levels (2 nA and 10 nA) to minimize $V_{DS}$ dependence.
• Hysteresis Analysis: Measurements were performed in both forward (increasing $V_{GS}$) and backward (decreasing $V_{GS}$) sweep modes to quantify hysteresis ($\Delta V_{th}$ and $\Delta SS$).
• Device Training: To mitigate time-dependent drift observed at cryogenic temperatures, a "training protocol" (gate-bias stressing) was implemented prior to data acquisition to stabilize device characteristics.
• Modeling: Contact behavior was modeled using Fowler-Nordheim tunneling, and electrostatic effects were investigated via Sentaurus TCAD simulations.

Key Results
The study reveals significant performance degradation and increased variability in commercial SiC MOSFETs as temperature decreases:

1. Threshold Voltage ($V_{th}$) Instability: $V_{th}$ exhibits non-monotonic behavior, increasing to a maximum of $\approx$ 11 V at $\approx$ 8 K before decreasing at deeper cryogenic temperatures. This is attributed to competing effects of intrinsic carrier concentration reduction, acceptor freeze-out, and interface trap occupancy.
2. Increased Hysteresis and Variability: While $V_{th}$ hysteresis is minimal at room temperature, it increases steadily below 1.5 K. The statistical spread ($\sigma_{V_{th}}$) of the threshold voltage increases significantly at low temperatures, indicating growing instability.
3. Subthreshold Swing (SS) Deterioration: Contrary to theoretical predictions that SS should improve (decrease) with cooling, the experimental SS increases significantly down to $\approx$ 4 K before decreasing slightly at lower temperatures. The relative hysteresis in SS peaks at $\approx$ 30% at 4 K. This degradation is linked to a high density of SiC/SiO$_2$ interface traps.
4. Schottky Contact Formation: At cryogenic temperatures, the source and drain contacts transition from ohmic to Schottky-like behavior due to carrier freeze-out in the $n^{++}$ contact regions. This results in a tunnel barrier that thickens as temperature drops, leading to contact resistances reaching approximately 500 k$\Omega$ in the linear region, far exceeding the 1 k$\Omega$ requirement for quantum applications.
5. Inter-Device Variability: While Device A and Device B show good agreement at higher temperatures, their performance metrics diverge significantly as temperature drops below 15 K, suggesting that device-to-device variability increases in the deep-cryogenic regime.
6. Time-Dependent Drift: Significant current drift was observed when devices were left idle at the operating point. This drift, modeled by double-exponential decay, is faster at lower temperatures, suggesting accelerated oxide-trap charging mechanisms.

Significance and Claims
The paper concludes that the specific commercial SiC power MOSFET technology evaluated is not currently suitable for integrated quantum electronics or cryo-CMOS applications. The primary limitations identified are:

• Lack of Ohmic Contacts: The transition to Schottky behavior and high contact resistance prevents the fast readout electronics required for single-shot charge detection.
• Poor Electrostatic Control: The degradation of the subthreshold swing and significant voltage hysteresis (well above the 1% functional limit) indicate unstable electrostatic control, which would hinder the precise tuning of quantum dots or tunnel barriers.
• Material and Interface Issues: The observed instabilities are rooted in material science challenges, specifically high interface trap densities at the SiC/SiO$_2$ interface and oxide quality.

The authors emphasize that while these specific devices are unsuitable, the findings highlight specific technological targets—improving interface trap density, oxide quality, and contact formation—that must be addressed to make SiC a viable platform for cryogenic quantum electronics. The study serves as a critical benchmark, demonstrating that current off-the-shelf SiC power devices require significant material and process advancements before they can be reliably deployed in quantum systems.