Lithographic integration of TES microcalorimeters with SQUID multiplexer circuits for large format spectrometers

This paper reports the first successful demonstration of a monolithic "System-on-a-Chip" fabrication process that integrates soft X-ray transition edge sensors (TES) with microwave SQUID multiplexers on a single silicon wafer using lithographically defined interconnects to maximize focal plane fill fraction for large-format spectrometers.

The Gist

The Big Picture: Packing More Sensors into a Tiny Space

Imagine you are trying to build a giant camera for X-rays. This camera needs thousands of tiny sensors (called TES detectors) to catch individual X-ray particles. The problem is, these sensors need to talk to a "brain" (called SQUID readout circuits) to process the data.

In the old way of building these cameras, the sensors and the brain were on separate chips. To connect them, engineers had to use tiny wires (like microscopic fishing lines) to solder them together.

• The Problem: You can only fit so many wires in a small space. It's like trying to park 10,000 cars in a parking lot where every car needs its own massive driveway. You run out of space, and the "fill rate" (how much of the camera is actually taking pictures vs. just wires) is low.
• The Goal: The researchers wanted to build a camera with 10,000 sensors instead of just 1,000. To do this, they needed to get rid of the messy wires.

The Solution: The "System-on-a-Chip" (TES-SoC)

The team at NIST and the University of Colorado decided to bake the sensors and the brain onto the same piece of silicon, like baking the crust and the toppings of a pizza on the same tray, rather than having them on separate plates.

They call this a TES-System-on-a-Chip (TES-SoC).

Instead of using wires to connect the sensors to the brain, they used lithography. Think of lithography like a super-precise stamping machine or a very high-tech printer. Instead of gluing wires on top, they "print" the copper (or in this case, niobium) roads directly onto the silicon surface, connecting the sensor to the brain with microscopic, printed pathways.

How They Built It (The "Layer Cake" Analogy)

Building this chip was like making a very complex, multi-layered cake where you have to protect the bottom layers while baking the top ones.

1. The Foundation (The Brain): First, they built the SQUID circuits (the brain) on the silicon wafer. These are super-sensitive magnetic sensors.
2. The Shield (The Frosting): Once the brain was built, they covered it with a protective layer of glass-like material (Silicon Dioxide). This is like putting a clear plastic dome over a delicate cake so you can work on the next layer without smudging the frosting.
3. The Sensors (The Toppings): Next, they built the X-ray sensors (the TES detectors) on top of the shield.
4. The Roads (The Interconnects): They then printed tiny roads connecting the sensors to the brain underneath.
5. The Final Touch: Finally, they removed the protective shield in specific spots to let the sensors "breathe" and connect to the outside world.

The Hurdle: The "Hot Plate" Problem

There was a catch. In their first test, they built these sensors directly on a thick block of silicon (like a heavy brick).

• The Issue: X-ray sensors need to be very cold and isolated. If they sit on a thick brick, heat travels through the brick too fast. It's like trying to keep an ice cream cone frozen while holding it with a hot metal spoon. The sensors got too hot too fast to work properly for X-ray detection.
• The Fix: For the final product, they plan to use a special "sandwich" wafer (Silicon-on-Insulator) where they can cut out the thick brick underneath the sensors, leaving them hanging on a thin, fragile membrane (like a trampoline). This keeps them cold and isolated.

Did It Work? (The Results)

Even though the first test version wasn't perfect for catching X-rays (because of the heat issue), the technology worked brilliantly:

• The Connection: The printed roads successfully connected the sensors to the brain.
• The Yield: Over 96% of the circuits worked perfectly.
• The Speed: They proved they could read the sensors using microwave signals, which is how the "brain" talks to the outside world.

Why Does This Matter?

This is a game-changer for science.

• Current Tech: We can build cameras with ~1,000 pixels.
• New Tech: This method allows us to build cameras with 10,000 pixels.

The Analogy:
Imagine you are trying to listen to a choir.

• Old Way: You have 1,000 microphones, but they are all tangled in a mess of wires, so you can only hear a few singers clearly.
• New Way: You have a microphone for every single singer, all neatly integrated into one smart system. You can hear the entire choir perfectly, in high definition.

This technology will allow scientists to study things like carbon catalysis (making cleaner fuels) or quantum physics much faster. Instead of waiting an hour to get a clear picture, they might get it in a few seconds because they have 10 times more "eyes" watching the action.

Summary

The researchers successfully proved that you can print X-ray sensors and their computer brains onto the same silicon chip using a "printing" process instead of messy wires. While they still need to solve a small heat-isolation issue for the final product, they have paved the way for the next generation of super-powerful X-ray cameras that will revolutionize how we see the microscopic world.

Technical Summary

1. Problem Statement

Current X-ray spectrometers utilizing Transition Edge Sensor (TES) microcalorimeter arrays face significant limitations in scaling pixel density due to interconnect constraints:

• Wirebond Limitations: Existing architectures connect TES detectors to Microwave SQUID Multiplexer (µMUX) readout chips using wirebonds or flip-chip bonds. The wirebond pad pitch (currently ~275 µm) sets a hard upper limit on pixel density.
• Scalability Issues: Scaling to next-generation spectrometers requiring ~10,000 pixels (e.g., for Resonant Inelastic X-ray Scattering) would necessitate over 40,000 wirebonds, which is mechanically challenging and inefficient.
• Fill Factor: The physical separation of detector and readout electronics reduces the active focal plane area (fill fraction), limiting photon collection efficiency.
• Thermal Isolation Conflicts: Standard TES fabrication requires a suspended membrane (typically SiN) for thermal isolation, while µMUX circuits are typically fabricated on bulk silicon. Integrating these on a single wafer poses challenges regarding dielectric thickness and thermal management.

2. Methodology

The authors developed a TES-System-on-a-Chip (TES-SoC) architecture, integrating soft X-ray TES detectors and µMUX readout electronics onto a single monolithic silicon wafer using lithographically defined interconnects.

• Fabrication Platform:
  • Initial Demonstration: Used bulk intrinsic silicon (76.2 mm diameter).
  • Future Design: Plans to utilize Silicon-on-Insulator (SOI) wafers with a 4 µm device layer and 200 nm buried oxide to allow for thermal suspension of TES detectors on the device layer.
• Process Flow (Bulk Silicon Demonstration):
  1. µMUX Fabrication: Grown a Nb-Al/Al$_x$O$_y$-Nb Superconductor-Insulator-Superconductor (SIS) trilayer. Defined rf-SQUIDs, microwave resonators, and bias circuits using standard lithography and etching.
  2. Passivation: Deposited a protective PECVD SiO$_2$ layer (I1) over the µMUX circuits.
  3. Interconnects & TES: Removed I1 in specific areas to fabricate TES-to-SQUID interconnects (Nb wiring) and MoAu bilayer TES detectors directly on the silicon substrate.
  4. Protection & Resonators: Deposited a second passivation layer (I2) to protect the µMUX during MoAu processing. Fabricated gold absorbers. Finally, etched I2 and the base Nb layer to expose microwave resonators.
• Key Innovation: Replaced wirebonds with lithographically defined Nb interconnects (L13/L14 in Fig. 1), eliminating the pitch limitation imposed by wirebond pads.

3. Key Contributions

• First TES-SoC Demonstration: This is the first reported integration of TES microcalorimeters and microwave SQUID multiplexers on a single silicon wafer using lithographic interconnects.
• Process Integration: Successfully combined two distinct fabrication flows (µMUX SIS junctions and MoAu TES bilayers) into a unified process without degrading the critical parameters of either component.
• High-Density Architecture: Demonstrated a path toward 10,000-pixel spectrometers by removing the wirebond pitch constraint, theoretically allowing for much higher fill fractions.
• Diagnostic Framework: Established in-process wafer-level diagnostics to monitor Josephson Junction (JJ) critical currents ($I_c$) and TES transition temperatures ($T_c$) throughout the complex fabrication sequence.

4. Results

The team fabricated and tested a 10 mm × 20 mm TES-SoC die containing 32 TES detectors and corresponding µMUX circuits.

• Yield and Functionality:
  • The µMUX devices showed a yield of >96%.
  • Microwave resonators were functional, with an average peak-to-peak frequency shift of 0.43 MHz in response to applied magnetic flux.
  • The mutual inductance ($M_{in}$) between input circuits and rf-SQUIDs was calculated to be ~9.2 pH.
• TES Performance:
  • Measured average transition temperature ($T_c$) of 141 ± 3 mK.
  • Limitation: Because the TES detectors were fabricated directly on bulk silicon (not suspended), they lacked thermal isolation. Consequently, the time constant was too fast and the current too high for optimal X-ray pulse readout in this specific demonstration. However, the electrical connection between TES and SQUID was confirmed functional.
• Resonator Quality Factors ($Q_i$):
  • Box Mode Interference: The larger chip size (10 mm × 20 mm) introduced "box modes" (standing waves in the silicon substrate), degrading the internal quality factor ($Q_i$) compared to smaller 4 mm × 20 mm test chips.
  • Despite this, >80% of resonators surpassed the 1 MHz bandwidth threshold, and >90% surpassed the 2 MHz threshold.
  • No additional degradation in $Q_i$ was attributed specifically to the extra TES fabrication steps; the degradation was primarily due to the chip form factor.
• Interconnects: The Nb interconnects showed critical currents ($I_c$) > 80 mA, significantly higher than the Mo wiring traces, ensuring robust electrical connection.

5. Significance and Future Outlook

• Enabling Next-Gen Spectrometers: This technology provides the necessary pathway to build high-resolution X-ray spectrometers with ~10,000 pixels, drastically reducing collection times for applications like Resonant Inelastic X-ray Scattering (RIXS) from tens of minutes to seconds.
• Broad Applicability: Beyond soft X-ray spectroscopy, TES-SoC technology is applicable to Gamma-ray detectors and large-array Cosmic Microwave Background (CMB) telescopes.
• Cost and Packaging: By integrating detectors and readout on a single chip, the need for complex chip-level packaging (wirebonds/flip-chip) is minimized, potentially reducing costs and improving reliability.
• Future Work:
  • Transition to SOI-Flex technology to thermally suspend TES detectors on Si membranes, enabling actual X-ray pulse detection.
  • Implement grounding structures on larger chips to mitigate box-mode losses and improve resonator $Q_i$.
  • Refine the process to ensure uniform $T_c$ across the wafer, addressing issues with molybdenum-silicide formation observed in the bulk silicon trial.

In conclusion, the paper successfully validates the feasibility of monolithic TES-SoC integration, overcoming the physical bottlenecks of wirebonding and paving the way for massive-scale, high-density X-ray detector arrays.