🔬 materials science

Colour Centre Formation in Silicon-On-Insulator for On-Chip Photonic Integration

This paper investigates the formation dynamics and optimization of various colour centres in silicon-on-insulator for quantum photonics, revealing coupled creation mechanisms, identifying optimal annealing and fabrication parameters, and discovering previously uncharacterized stable optical signals.

Original authors: Arnulf J. Snedker-Nielsen, David R. Gongora, Magnus L. Madsen, Christian H. Christiansen, Eike L. Piehorsch, Mathias Ø. Augustesen, Elvedin Memisevic, Sangeeth Kallatt, Rodrigo A. Thomas, Mark Kamper

Published 2026-01-27

📖 5 min read🧠 Deep dive

CC BY 4.0

Original authors: Arnulf J. Snedker-Nielsen, David R. Gongora, Magnus L. Madsen, Christian H. Christiansen, Eike L. Piehorsch, Mathias Ø. Augustesen, Elvedin Memisevic, Sangeeth Kallatt, Rodrigo A. Thomas, Mark Kamper Svendsen, Peter Krogstrup Jeppesen, Marianne E. Bathen, Lasse Vines, Peter Granum, Stefano Paesani

Original paper licensed under CC BY 4.0 (http://creativecommons.org/licenses/by/4.0/). ✨ This is an AI-generated explanation of the paper below. It is not written or endorsed by the authors. For technical accuracy, refer to the original paper. Read full disclaimer

Imagine a silicon chip not just as a brain for a computer, but as a vast, empty city made of atoms. In this city, scientists want to build tiny, glowing "houses" called colour centres. These aren't real houses, but tiny defects in the silicon where atoms have been swapped out or rearranged. When you shine a light on them, they glow with a single, perfect photon (a particle of light). This is crucial for building future quantum computers, which need these perfect light particles to send information.

This paper is like a construction manual for building these glowing houses in a specific type of silicon city called "Silicon-On-Insulator" (SOI). The authors are trying to figure out exactly how to build these houses so they can be mass-produced for quantum technology.

Here is how they did it, explained simply:

1. The Ingredients and the Recipe

To build these glowing defects, the scientists start with a standard silicon chip. They use an "ion implantation" process, which is like firing tiny bullets of Carbon and Hydrogen atoms into the silicon. This creates a lot of chaos and damage in the crystal structure, leaving behind a messy construction site.

To turn this mess into a working house, they need to "cook" the chip. This cooking process is called thermal annealing. The big question the paper answers is: How hot should we cook it, and for how long?

2. The Temperature "Goldilocks" Zone

The scientists tested cooking the chips at temperatures ranging from 200°C to 600°C. They found that different types of glowing houses (defects) only appear at specific temperatures, much like different types of bread only rise at specific oven settings.

The Early Birds (Low Heat): At lower temperatures (around 200–240°C), you get the G, C, and W centres. These are like the first houses to appear. However, if you keep heating the oven past 300–400°C, these houses start to crumble and disappear.
The Late Arrivals (High Heat): As the temperature climbs past 400°C, the early houses vanish, but new, more complex houses start to form. The T centre (a very important one for quantum tech) and the I centre only appear when the oven is hot, specifically around 525°C.
The Disappearing Act: If you get the oven too hot (above 570°C), even the T centres break apart, and the lights go out.

The Big Discovery: Previous studies suggested the perfect temperature for the T centre was around 450°C. This paper says, "Actually, no!" They found the sweet spot is 525°C. It's a significant difference, like realizing your cake needs to bake at 375°F instead of 350°F to rise properly.

3. The "Ghost" Houses and New Discoveries

While watching the houses appear and disappear, the scientists noticed something strange. Between 360°C and 420°C, almost all the lights went out. It was a "dead zone." They suspect that during this time, the atoms are rearranging into invisible, "ghost" structures that aren't glowing yet. These ghosts seem to be the necessary stepping stones to building the T centre later on.

They also found a brand new type of house that no one had seen before. They call it CN*. It glows at a very specific color (1496 nm), which is in the "S-band" used for telecommunications. It looks like it's made of Carbon and Nitrogen. It's very stable and only appears at high heat (540°C+). This is exciting because it might be an even better candidate for quantum computers than the T centre.

4. The Construction Site Hazards (Fabrication)

Building a quantum chip isn't just about cooking; it involves carving tiny roads and bridges (nanofabrication) into the silicon. The scientists wanted to know: Does the construction work destroy our glowing houses?

They found that one specific step, called ashing (using plasma to clean off protective layers), is dangerous. It's like a strong wind that blows away the delicate houses.

Direct Ashing: If you blast the chip directly with plasma, you lose your T centres.
The Fix: They found two ways to save the houses:
1. Cook after you clean: Do all the messy construction and cleaning first, then do the final high-heat cooking. This way, the houses are built fresh after the danger is over.
2. Remote Ashing: Use a "remote" plasma cleaner where the plasma is generated in a separate room and gently drifted to the chip. This is like using a gentle breeze instead of a hurricane, and it keeps the houses safe.

5. Timing is Everything

They also checked how long to cook the chips. They found that once the temperature hits the sweet spot (525°C), you only need to cook for about 2 minutes (120 seconds). Cooking longer than that doesn't help; in fact, if you cook for 10 minutes, the T centres start to break down again. It's like baking a soufflé: leave it in too long, and it collapses.

Summary

In short, this paper provides a precise recipe for making quantum light sources in silicon:

Shoot carbon and hydrogen into the silicon.
Clean the chip gently (using remote ashing) or clean it before the final cooking.
Cook at 525°C for about 2 minutes.
Avoid temperatures between 360°C and 420°C if you want the T centre, as that's where the "ghost" phase happens.
Look out for a new, stable glowing defect (CN*) that appears at high heat.

By following these steps, scientists can reliably build the "houses" needed to power the quantum computers of the future.

Technical Summary: Colour Centre Formation in Silicon-On-Insulator for On-Chip Photonic Integration

Problem Statement
Silicon colour centres (SiCCs), particularly the T centre, offer significant potential as single-photon sources with optically active spins for quantum technologies. While the integration of these emitters into silicon-on-insulator (SOI) platforms is essential for scalable photonic quantum devices, the precise formation dynamics of these defects within the standard SOI material stack remain poorly understood. Key uncertainties include the coupled formation mechanisms between different defect types, the optimal thermal annealing parameters (temperature and duration), and the impact of standard nanofabrication steps (such as electron-beam lithography and plasma cleaning) on defect stability. Previous literature suggests optimal T centre formation at approximately 450 °C, but discrepancies exist regarding process parameters and the influence of specific fabrication sequences.

Methodology
The study utilizes commercially available 220 nm SOI wafers with high resistivity. The experimental workflow involves:

Ion Implantation: Sequential implantation of Carbon ( $^{12}$ C) and Hydrogen ions using a 1:1 fluence ratio (specifically $7 \times 10^{13} \text{cm}^{-2}$ for $^{12}$ C in main experiments), followed by a 1000 °C curing anneal to repair lattice damage.
Activation Annealing: A systematic scan of activation annealing temperatures ranging from 200 °C to 600 °C with steps smaller than 20 °C, and durations from 30 to 600 seconds. The atmosphere is nitrogen. The study also investigates the inclusion of a boiling step in deionised water prior to activation.
Fabrication Integration: To assess the impact of device manufacturing, the authors interrupt the fabrication process at various stages (spin coating, e-beam exposure, etching, and resist stripping/ashing) to measure photoluminescence (PL) after each step. Both direct and remote plasma ashing methods are compared.
Characterization: PL spectra are recorded using a cryogenic setup (4.8 K) with excitation lasers at 405, 532, and 852 nm. The detection range spans 1040 to 1660 nm using an InGaAs array detector. Secondary ion mass spectroscopy (SIMS) is employed to track ion distribution pre- and post-annealing.

Key Results

Coupled Formation Dynamics: The study reveals distinct, temperature-dependent formation windows for various SiCCs.
- W, G, C, and M Centres: These are detectable in as-implanted samples. The G centre (1278 nm) and C centre (1570 nm) peak at lower temperatures (200–260 °C) and diminish rapidly above 340–400 °C. The M centre (1629 nm) exhibits a bimodal distribution, with a plateau at 220–320 °C and a revival at 435–570 °C.
- T and I Centres: The T centre (1325 nm) and I centre (1284 nm) appear only after the suppression of the G and C centres. The T centre becomes observable around 390 °C, reaching a maximum density at 525 °C, and becomes undetectable above 570 °C. The I centre follows a similar trend, peaking at 530 °C.
- Discrepancy with Literature: The observed optimal temperature for T centre formation (525 °C) is significantly higher than the ~450 °C reported in previous studies. The authors note that variations in rapid thermal processing (RTP) settings do not account for this difference.
Annealing Duration: At the optimal temperature of 525 °C, T centre density remains stable for annealing times up to 120 seconds. Beyond 10 minutes, a reduction in T centre density is observed, suggesting that annealing duration can serve as a tuning parameter for defect density.
Fabrication Effects: Standard fabrication steps generally do not affect SiCCs, with one critical exception: ashing (plasma resist removal). Direct ashing significantly reduces T, I, and M centre densities while simultaneously reactivating G and C centres, likely due to the decomposition of optically inactive precursors. However, remote ashing or performing the final annealing step after all fabrication processes (including ashing) preserves the T centre density.
Novel Defects: The authors identify a stable, previously uncharacterized emission line at 1496.66 nm (S-band). This signal appears above 520 °C and peaks at 570 °C. The authors tentatively label this CN*, associating it with a theoretically proposed carbon-nitrogen defect ((CN) $_{Si}$ ) that shares spin-triplet ground state properties with the T centre.

Significance and Claims
The paper claims to provide a comprehensive map of the formation dynamics of SiCCs in SOI, specifically addressing the coupled relationships between different defect types. The primary contribution is the identification of an optimal activation annealing temperature of 525 ± 10 °C for T centres, which challenges existing literature values. Furthermore, the study establishes that the order of fabrication steps is critical; specifically, delaying the final annealing until after plasma cleaning (ashing) or utilizing remote ashing is necessary to maintain high T centre densities in integrated photonic circuits.

The discovery of the stable 1496 nm emission (CN*) is presented as a significant finding, offering a potential new candidate for quantum emitters that may possess the advantageous spin properties of the T centre but with potentially greater thermal stability due to the nature of nitrogen bonding. The authors position these results as essential guidance for the mass-manufacturable integration of quantum emitters in silicon photonic devices, emphasizing that process optimization must account for the specific thermal and chemical sensitivities of these defect complexes.