At the Edge of the Heart: ULP FPGA-Based CNN for On-Device Cardiac Feature Extraction in Smart Health Sensors for Astronauts

1. Problem Statement

The paper addresses the critical challenge of monitoring astronaut health during deep-space missions (Moon/Mars), where communication latency with Earth renders real-time remote supervision impossible.

• Constraints: Deep-space health sensors must be ultra-low-power (ULP), radiation-resilient, miniaturized, and capable of fully autonomous, real-time decision-making.
• Technical Challenge: Traditional cardiovascular monitoring relies on Seismocardiography (SCG), which captures heart mechanical vibrations. However, extracting clinically meaningful features (systolic and diastolic intervals) from SCG signals is difficult due to motion artifacts and microgravity effects.
• Hardware Limitation: While Convolutional Neural Networks (CNNs) offer superior feature extraction compared to traditional methods, they are computationally intensive. Deploying them on resource-constrained, battery-powered wearable devices (specifically those using Commercial Off-The-Shelf or COTS components to save mass) is typically infeasible due to limited logic resources, memory, and the inability to use power-hungry, radiation-hardened processors.

2. Methodology

The authors propose a co-designed hardware-software solution to enable on-device CNN inference on a Lattice iCE40UP5K FPGA.

A. Hardware Platform

• Device: Lattice iCE40UP5K, an Ultra-Low-Power (ULP) FPGA known for milliwatt-level power consumption and demonstrated radiation resilience.
• Sensor: A space-grade wearable sensor using differential Inertial Measurement Units (IMUs) to capture SCG signals at 1 kHz with high precision (61µg).
• Architecture: A custom systolic-array accelerator designed specifically for the iCE40UP5K's limited resources (128 kB SPRAM, 8 DSP blocks).

B. Algorithm & Model Design

• Model: A 1D Convolutional Neural Network (CNN) designed to classify SCG windows into three classes: Systolic, Diastolic, and Background.
• Architecture: Four convolutional blocks (16→32→64→96 channels) followed by Global Average Pooling (GAP) and a Fully Connected (FC) layer.
• Optimization (Quantization-Aware Training - QAT):
  • To fit the model on the FPGA, the authors employed QAT to convert the model from 32-bit floating-point (FP32) to 8-bit integer (INT8).
  • This reduced the model size by ~70% (from 226.5 KB to 68.2 KB) with negligible accuracy loss (<0.4%).
  • Operations like Batch Normalization and ReLU were fused into the convolution weights to save hardware cycles.

C. FPGA Accelerator Architecture

The inference engine is organized into three subsystems:

1. Memory Subsystem: Utilizes a hierarchical memory structure combining Single-Port RAM (SPRAM) for weights and Ping-Pong buffers for zero-copy data transfer between layers. It supports dynamic weight loading via UART.
2. Compute Subsystem (Systolic Array):
   • Uses a 1D systolic array of 6 DSP blocks arranged in a pipeline.
   • Input features flow through the pipeline while weights are broadcast, enabling 6 Multiply-Accumulate (MAC) operations per clock cycle.
   • Includes a custom Requantization & Activation Engine to handle 32-bit to 8-bit conversion and ReLU saturation.
3. Control Subsystem: A hierarchical Finite State Machine (FSM) that manages weight loading, layer sequencing, and dataflow without an instruction fetch mechanism, minimizing overhead.

3. Key Contributions

1. First ULP FPGA SCG Classifier: Demonstrates the feasibility of running a CNN for real-time cardiac feature extraction on a milliwatt-class FPGA (iCE40UP5K), a platform previously considered too constrained for deep learning.
2. Systolic Array Co-Design: Developed a custom systolic-array accelerator that maximizes the use of the FPGA's 8 embedded DSP blocks and 128 kB RAM, achieving high data reuse and minimizing memory bandwidth bottlenecks.
3. QAT Implementation: Successfully applied Quantization-Aware Training to maintain high accuracy (98%) while reducing model size and enabling integer-only inference, crucial for the target hardware.
4. Space-Grade Validation: Validated the system using data collected from human subjects under ethical approval, simulating the conditions required for ESA's "Cosmic Kiss" mission hardware.

4. Results

The system was evaluated on both classification accuracy and hardware performance metrics.

• Accuracy:
  • Validation Accuracy: 98.32% (INT8 QAT model) vs. 98.68% (FP32 baseline).
  • Test Accuracy: 97.68% (INT8).
  • Metrics: High F1-scores (0.955) and Average Precision (0.995) for both systolic and diastolic events, demonstrating robustness against class imbalance.
• Hardware Performance (iCE40UP5K):
  • Power Consumption: 8.55 mW (average).
  • Inference Time: 95.5 ms per window (approx. 10.6 FPS).
  • Energy Efficiency: 819 µJ per inference.
  • Resource Utilization: 2,861 LUTs (54% of total) and 7 DSP blocks (87% of total).
• Comparison with MCU Baseline (nRF52840):
  • The FPGA solution is 4.4× more energy-efficient (819 µJ vs. 3.6 mJ).
  • The FPGA is 3.3× faster (95.5 ms vs. 314.9 ms).
  • The FPGA consumes less power (8.55 mW vs. 11.4 mW) despite operating at a lower clock frequency (24 MHz vs. 64 MHz).

5. Significance

This work represents a significant step forward for autonomous space medicine.

• Mission Critical: It enables astronauts to receive immediate, accurate cardiac health assessments without relying on ground control, which is vital for missions where communication delays can reach minutes or hours.
• Resource Efficiency: By proving that complex deep learning tasks can run on low-cost, low-power COTS FPGAs, the paper opens the door for deploying advanced AI on a wide range of resource-constrained wearable devices, not just in space but also in terrestrial remote health monitoring.
• Scalability: The modular systolic-array design and QAT approach provide a blueprint for scaling more complex biomedical AI models onto ultra-low-power hardware.

In conclusion, the paper successfully bridges the gap between advanced deep learning algorithms and the extreme constraints of space-grade wearable hardware, delivering a fully autonomous, energy-efficient cardiac monitoring system.