🔬 materials science

Band Tail States: Speed Bump or End of the Road for Two-Dimensional Semiconductors?

This paper proposes that mastering energy band tail states, which currently limit the performance and energy efficiency of monolayer 2D semiconductors due to their rough band edges, is essential for their successful integration into low-power nanoelectronics and outlines specific strategies to mitigate these effects.

Original authors: Zherui Han, Robert K. A. Bennett, Davide Donadio, Maritha A. Wang, Tara Peña, Mikaël Cassé, Martin Vanbrabant, Valeriya Kilchytska, Jean-Pierre Raskin, Eric Pop

Published 2026-10-09

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CC BY 4.0

Original authors: Zherui Han, Robert K. A. Bennett, Davide Donadio, Maritha A. Wang, Tara Peña, Mikaël Cassé, Martin Vanbrabant, Valeriya Kilchytska, Jean-Pierre Raskin, Eric Pop

Original paper licensed under CC BY 4.0 (http://creativecommons.org/licenses/by/4.0/). ✨ This is an AI-generated explanation of the paper below. It is not written or endorsed by the authors. For technical accuracy, refer to the original paper. Read full disclaimer

In the quest to make electronics smaller and more efficient, scientists have turned their attention to materials that are only one atom thick. These two-dimensional semiconductors are like ultra-thin sheets of fabric, offering a way to control electricity in spaces where traditional silicon would crumble or fail. For decades, the industry has relied on silicon, a material with a very clean and predictable internal structure. In a perfect silicon crystal, the energy levels that electrons need to jump to start moving are sharp and well-defined, like the edge of a cliff. This sharpness allows transistors—the tiny switches that power our digital world—to turn on and off quickly and with very little energy. However, when researchers began working with these new, atomically thin materials, they found that the edges of these energy cliffs were not sharp at all. Instead, they were fuzzy and uneven, creating a landscape of small hills and valleys that electrons had to navigate. This fuzziness, known as band tail states, acts like a speed bump for electrons, slowing them down and forcing the transistors to use more power to get the job done.

A team of researchers at Stanford University and other institutions has now mapped out exactly how these fuzzy energy edges affect the performance of the thinnest possible transistors. They focused on a popular two-dimensional material called molybdenum disulfide, which is often used as a test case for these new technologies. By combining computer simulations with real-world electrical measurements, the team discovered that the roughness of the energy landscape is the primary reason why these new transistors struggle to match the efficiency of silicon. In their experiments, they found that the energy "tail" in these two-dimensional materials was roughly ten times wider than in standard silicon. This wide tail means that as a transistor tries to turn on, a significant number of electrons get trapped in these low-energy pockets, unable to contribute to the flow of current. The device has to be pushed with a much higher voltage to force the electrons out of these traps and into the main channel, which wastes energy and generates heat.

The researchers showed that this problem is not just a minor flaw but a fundamental limit imposed by the way these thin sheets interact with the materials surrounding them. Because the sheets are so thin, they are incredibly sensitive to the roughness of the glass or oxide layers they sit on. Even microscopic bumps in the insulating layer cause the energy landscape of the semiconductor to ripple, creating the fuzzy tails that hinder performance. The team used advanced computer modeling to visualize how these ripples form, showing that the atoms in the thin sheet bend and twist to follow the uneven surface beneath them. This physical deformation creates the electrical disorder that slows down the electrons. When they compared their models to actual measurements of transistors made from this material, the numbers matched perfectly, confirming that the fuzzy energy edges were indeed the culprit behind the sluggish performance.

However, the study does not suggest that these materials are a dead end. Instead, the authors propose a clear path forward. They found that the negative effects of these fuzzy energy edges can be significantly reduced if the transistor is built with a stronger connection between the gate—the part that controls the flow—and the channel. Specifically, if the insulating layer is made thinner, the gate can exert a stronger pull on the electrons, helping them overcome the energy traps. Their calculations suggest that if the fuzziness of the energy edge can be kept below a certain threshold, and if the gate is strong enough, these transistors could operate with the high efficiency needed for future low-power electronics. The researchers also noted that using two layers of the material instead of just one might help, as the extra thickness makes the sheet more rigid and less likely to warp over the rough surface below.

Ultimately, this work provides a roadmap for engineers who hope to integrate these ultra-thin materials into the next generation of computers. It clarifies that the current struggles with two-dimensional electronics are not due to a lack of quality in the materials themselves, but rather to the environmental disorder introduced by the devices they are built into. By understanding that the solution lies in smoothing out the energy landscape and strengthening the electrical control, scientists can now focus their efforts on designing devices that minimize these rough edges. The findings suggest that while the road to perfect two-dimensional electronics has been bumpier than expected, it is not blocked. With the right design choices, these materials can still deliver the speed and efficiency required to power the devices of the future.

Technical Summary: Band Tail States in Two-Dimensional Semiconductors

Problem Statement
While ultrathin, monolayer two-dimensional (2D) semiconductors offer theoretical advantages for scaling and electrostatic control in transistors compared to silicon, their practical performance is hindered by fundamental transport limitations. Unlike bulk silicon, which possesses sharp band edges, current monolayer 2D semiconductors exhibit "rough" band edges characterized by significant energy band tail states (BTS). These states arise from spatial potential inhomogeneities caused by interactions with substrates and dielectrics, as well as intrinsic electron-phonon coupling. The presence of substantial BTS degrades effective carrier mobility, causes "slow" transistor turn-on characteristics, and necessitates excessive gate voltages, thereby limiting the energy efficiency of 2D electronics.

Methodology
The authors employ a multi-faceted approach combining theoretical modeling, experimental data analysis, and molecular dynamics (MD) simulations:

Physics-Based Electrical Modeling: The authors modified a standard electrical transport model to incorporate an exponential density of states (DOS) for band tail states. This model distinguishes between band-like transport (when the Fermi level is above the band edge) and hopping transport (when the Fermi level is within the tail states).
Experimental Fitting: The model was fitted to experimental drain current versus gate voltage ( $I_D$ - $V_{GS}$ ) data from long-channel monolayer MoS2 transistors and silicon-on-insulator (SOI) transistors. Key parameters extracted included the Urbach energy ( $E_U$ ), which quantifies the width of the band tail, and the total tail state density ( $N_U$ ).
Monte Carlo Simulations: To understand the impact of potential fluctuations on mobility, the authors performed Monte Carlo simulations of electron transport under spatially-random Gaussian potentials. These simulations estimated the reduction in band mobility ( $\mu_{band}$ ) as a function of potential fluctuation amplitude.
Molecular Dynamics (MD) Simulations: MD simulations were conducted to analyze the physical origins of potential inhomogeneity. These simulations modeled monolayer and bilayer MoS2 films supported or encapsulated by amorphous silicon dioxide (a-SiO2) at room temperature to quantify surface roughness, out-of-plane atomic displacements, and bending curvature.

Key Results

Magnitude of Band Tail States: Experimental fitting reveals that monolayer MoS2 transistors on a-SiO2 substrates exhibit an Urbach energy ( $E_U$ ) of approximately 96 meV, significantly higher than the ~13–23 meV observed in comparable silicon devices. Intrinsic limits for 2D materials (due to electron-phonon coupling) are estimated around 18–32 meV, but substrate-induced disorder pushes $E_U$ well beyond this, up to 200 meV in some cases.
Impact on Mobility: The presence of BTS significantly reduces the effective mobility ( $\mu_{eff}$ ) relative to the intrinsic band mobility ( $\mu_{band}$ ). Simulations indicate that for typical $E_U$ values found in current devices (~100 meV), the effective mobility drops to nearly half of the band mobility when the Fermi level is at the conduction band edge. This occurs because carriers are localized in tail states where hopping mobility is negligible.
Transistor Turn-On Characteristics: Large $E_U$ values cause a "curved knee" in the transfer characteristics, requiring a wider gate voltage range to switch the transistor from off to on. The authors define a turn-on voltage range ( $\Delta V_4$ ) for a four-decade current change. They find that for $E_U > 30$ meV, this voltage range degrades rapidly, increasing power consumption.
Mitigation Strategies: The study identifies specific pathways to mitigate BTS effects:
- Gate Capacitance: Reducing the equivalent oxide thickness (EOT) to 0.5 nm (stronger capacitive coupling) allows for acceptable operation even if $E_U$ is slightly higher, provided it remains below ~50 meV.
- Layer Thickness: Bilayer 2D channels exhibit reduced sensitivity to substrate roughness compared to monolayers, as shown by MD simulations where bilayer MoS2 on a-SiO2 has lower out-of-plane displacement and bending curvature than monolayers.
- Substrate Engineering: Using high-quality, flat substrates like hexagonal boron nitride (h-BN) or graphite reduces $E_U$ closer to the intrinsic limit (~36 meV) compared to amorphous oxides.

Significance and Claims
The paper posits that band tail states represent a fundamental, yet often overlooked, limit to the performance of 2D semiconductor electronics. The authors argue that without addressing the spatial inhomogeneity causing these tails, 2D transistors will suffer from inefficient operation and excessive voltage requirements, potentially preventing their successful integration into low-power nanoelectronics.

The work provides a theoretical framework to quantify these limits and offers design guidelines to navigate them. Specifically, it suggests that the "end of the road" for 2D electronics is not inevitable; rather, by reducing $E_U$ below approximately 50 meV through improved substrates, strain engineering, or the use of bilayer channels, and by utilizing high-capacitance gate stacks, the full potential of 2D semiconductors can be realized. The study emphasizes that while intrinsic electron-phonon coupling sets a lower bound for $E_U$ , the dominant factor in current devices is extrinsic disorder from the environment, which is amenable to engineering solutions.

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