Energy-Efficient Hybrid Approximate Radix-8 Multiplication Architecture for Adaptive Acoustic Feedback Suppression in Wearable Hearing Aids
This paper presents an energy-efficient adaptive acoustic feedback suppression architecture for wearable hearing aids that utilizes a hybrid approximate Radix-8 multiplier and an approximate SAR ADC to achieve significant power reduction and low latency while maintaining high speech quality, as validated by FPGA implementation results showing superior performance compared to existing methods.
Original paper licensed under CC BY 4.0 (https://creativecommons.org/licenses/by/4.0/). This is an AI-generated explanation of the paper below. It is not written or endorsed by the authors. For technical accuracy, refer to the original paper. Read full disclaimer
Sound is the bridge between people, carrying the nuance of a conversation and the comfort of a familiar voice. For millions of people with hearing loss, wearable devices act as a vital link, amplifying the world so they can participate fully. However, these devices face a persistent physical challenge: the microphone that listens to the world and the speaker that delivers the sound sit so close together that the amplified sound often loops back into the microphone. This creates a high-pitched whine known as acoustic feedback, a noise that not only ruins the listening experience but forces the device to lower its volume, leaving the user struggling to hear. Solving this requires the device to constantly listen, calculate, and subtract the feedback in real time, a process that demands significant computing power and battery life, two resources that are always scarce in a small, wearable gadget.
Researchers at Vel Tech Rangarajan Dr. Sagunthala R & D Institute of Science and Technology have proposed a new way to handle this problem, focusing on the very heart of the calculation: the multiplication. In digital signal processing, the device must constantly multiply numbers to figure out how much feedback is present and how to cancel it. The team, led by Bharathi Vijayakumar and Kalpana Devi Perumal, designed a system that performs these multiplications with far less energy and hardware than current methods, without sacrificing the clarity of the speech. They call their approach HARMONIC-AFS, a method that combines a smart way of capturing sound with a simplified, yet highly effective, calculation engine.
The process begins before the complex math even starts. When a person speaks, the sound waves enter the hearing aid as an electrical signal. Traditionally, converting this signal into a digital format that a computer can understand requires a lot of energy, especially when the device tries to capture every tiny detail of the sound. The researchers realized that human speech is naturally quiet and does not use the full range of digital precision available. They introduced a modified converter that acts like a filter, ignoring the insignificant parts of the signal and focusing only on the important bits. By skipping the conversion of the less important data, the device saves a substantial amount of power right at the source, ensuring the battery lasts longer while still capturing the voice clearly.
Once the sound is digitized, the device must identify and remove the feedback. This is done using a filter that constantly adjusts itself to match the path the sound takes from the speaker back to the microphone. The core of this filter relies on multiplying the incoming sound by a set of numbers that represent the feedback path. In standard designs, these multiplications are heavy, slow, and energy-hungry. The researchers replaced the standard multiplication unit with a new, hybrid design that splits the work into two parts. For the most important parts of the calculation, they use a refined encoding method that reduces the number of steps needed. For the less critical parts, they use a simplified approach that rounds off the numbers and discards the tiny errors that the human ear would never notice. This hybrid strategy, which they named the HARMONIC multiplier, drastically cuts down on the physical space the chip needs and the electricity it consumes.
To make this work, the team also integrated a specialized component that compresses the data during the calculation. Instead of processing every single piece of information with perfect precision, this component groups the data in a way that speeds up the process and reduces the number of electronic switches that need to flip. This reduction in activity is crucial because every time a switch flips, it uses energy and generates heat. By minimizing these flips, the device can run faster and cooler. The entire system was tested on a specialized computer chip designed for rapid prototyping, allowing the researchers to verify that their theoretical design works in a real-world setting.
The results of this work show a significant improvement in both efficiency and performance. When tested with a standard set of noisy speech recordings, the new system improved the clarity of the sound by a factor of 20.5 decibels, a substantial gain that makes speech much easier to understand in loud environments. The quality of the processed speech, measured by how natural it sounds to a human listener, reached a score of 3.46, which is higher than what other current methods achieve. Perhaps most importantly for a wearable device, the new design consumed 119.8 milliwatts of power, which is roughly 37 percent less than the next most efficient method tested. It also processed the sound in just 43.05 nanoseconds, a fraction of a second, ensuring that the user hears the world in real time without any lag.
The researchers compared their design against several existing technologies, including methods that use different types of multipliers and filtering techniques. In every category, from the amount of physical space the chip occupies to the speed at which it operates, the new approach came out ahead. It used fewer than half the number of logic blocks required by some competing designs and operated at a higher speed, reaching a frequency of 111.1 megahertz. The error rate, which measures how far the calculation deviates from the perfect mathematical answer, was kept incredibly low at 1.68 percent, proving that the energy-saving shortcuts did not introduce noticeable distortions.
This work demonstrates that it is possible to build hearing aids that are both smarter and more efficient. By rethinking how the device handles the fundamental math of sound processing, the researchers have created a path toward hearing aids that can suppress annoying feedback more effectively while lasting longer on a single charge. The findings suggest that future devices could be smaller, more powerful, and more comfortable for the user, offering a clearer connection to the world for those who rely on them. The team plans to expand this work to handle multiple channels of sound simultaneously and to test the design on even more advanced computer chips, aiming to bring these benefits to the next generation of wearable hearing technology.
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