🤖 machine learning

A Synthesizable RTL Implementation of Predictive Coding Networks

This paper presents a complete, synthesizable RTL architecture that implements discrete-time predictive coding networks in hardware by utilizing local prediction-error dynamics and a uniform clamping primitive to enable fully distributed, online supervised learning without global error propagation or centralized memory.

Original authors: Timothy Oh

Published 2026-03-20

📖 5 min read🧠 Deep dive

CC BY 4.0

Original authors: Timothy Oh

Original paper licensed under CC BY 4.0 (http://creativecommons.org/licenses/by/4.0/). ✨ This is an AI-generated explanation of the paper below. It is not written or endorsed by the authors. For technical accuracy, refer to the original paper. Read full disclaimer

Imagine you are trying to teach a massive team of workers how to build a complex structure, like a skyscraper.

The Old Way: The Centralized Boss (Backpropagation)

In the world of modern AI (Deep Learning), we usually use a method called Backpropagation. Think of this as a construction site run by a single, overworked boss in a central office.

The workers build a floor.
The boss checks the whole building, sees a mistake on the 10th floor, and realizes the error actually started on the 2nd floor.
The boss has to send a message all the way back down to the 2nd floor, telling them exactly how to fix it.
Then, everyone stops, waits for the boss's instructions, and updates their work.

The Problem: This requires a huge amount of "talking" up and down the building. It needs a central brain, a lot of memory to remember every step, and everyone has to stop and wait for the boss. It's hard to build this kind of system into a tiny, self-contained chip (like a robot's brain) because the "boss" can't be everywhere at once.

The New Way: The Neighborhood Watch (Predictive Coding)

This paper proposes a different approach called Predictive Coding. Instead of a boss, imagine every worker is part of a Neighborhood Watch.

The Rule: You only talk to your immediate neighbors (the floor above you and the floor below you).
The Job:
- You look at what the floor above you is doing and guess what the floor below you should be doing.
- You look at what the floor below you is actually doing.
- If there is a difference between your guess and reality, that's a "Prediction Error."
The Fix: You don't wait for a boss. You and your neighbor immediately talk, compare notes, and adjust your own work right now to reduce that error.

In this system, learning happens locally. No one needs to know about the whole building; they just need to know about their immediate neighbors.

What This Paper Actually Built

The author, Timothy Oh, didn't just write a theory; he built the blueprint for a digital machine that does this Neighborhood Watch system directly in hardware.

Here is the breakdown of his invention using simple metaphors:

1. The "Neural Core" (The Worker's Desk)

Instead of a giant computer running a program, the author built a tiny, self-contained "desk" for every single neuron (worker).

Self-Sufficient: Each desk has its own notepad (memory), its own calculator, and its own rules.
Hardwired: The desks are physically connected only to the desks directly above and below them. No Wi-Fi, no central server. Just wires.
The Routine: Every "tick" of the clock, the worker goes through a strict, pre-programmed routine:
1. Predict: "What do I think my neighbor is doing?"
2. Check: "What are they actually doing?"
3. Calculate Error: "How wrong was I?"
4. Adjust: "I'll tweak my own behavior and tell my neighbor to tweak theirs."

2. The "Clamping" (The Teacher's Hand)

How do you teach this system? You don't rewrite the code. You just hold the hands of the first and last workers.

Input Clamping: You force the bottom floor to look at a picture of a cat.
Output Clamping: You force the top floor to say "Cat."
The Magic: The workers in the middle (the hidden layers) have to figure out the rest on their own by passing errors up and down. It's like a game of "Telephone" where everyone tries to make the message match the start and end points.

3. Why This Matters (The "Mortal Computation" Idea)

The paper mentions a cool concept called "Mortal Computation."

Standard Computers: You write software (instructions) and run it on any hardware. If you break the computer, you just buy a new one and load the same software. The software is immortal.
This System: The "software" is the hardware. The rules for learning are physically built into the wires and logic gates of the chip. If you build this chip, it is the learning algorithm. You can't separate the brain from the body. This makes it incredibly efficient and perfect for things like robots that need to learn on the fly without a giant cloud server.

The Results

The author tested this digital "Neighborhood Watch" on a computer simulation.

It successfully learned to solve math problems (regression).
It worked on different sizes of networks (small and large).
It didn't need a central boss to coordinate anything.
It learned just by passing errors between neighbors, exactly as the theory predicted.

The Bottom Line

This paper is a proof-of-concept blueprint. It shows that we can build AI chips that learn like biological brains: locally, continuously, and without needing a central brain to tell them what to do. It trades a little bit of speed (because the workers do things one by one) for a massive gain in simplicity and the ability to be built into small, distributed devices.

It's a step toward building robots that can learn on the spot, right where they are, without needing to download a massive update from the internet.

1. Problem Statement

Modern deep learning relies heavily on backpropagation, a paradigm that requires:

Global Coordination: Error signals must propagate backward through the entire network, creating non-local dependencies.
Phase Separation: Distinct forward, backward, and update phases requiring synchronization.
Centralized Memory: Heavy reliance on storing intermediate activations and moving data between memory and compute units.

These requirements make backpropagation difficult to implement as a fully distributed, online learning system in hardware, particularly for embedded or neuromorphic applications where locality and energy efficiency are critical. The paper addresses the need for a hardware substrate that supports learning via strictly local dynamics, avoiding global error propagation and centralized control.

2. Methodology

The paper proposes a digital micro-architecture that implements Predictive Coding (PC) directly in hardware. Unlike traditional neural networks that separate inference and training, PC frames both as the minimization of prediction errors across a hierarchy.

Core Algorithm

The system minimizes a global quadratic energy function $E = \sum ||\epsilon^{(\ell)}||^2$ , where $\epsilon^{(\ell)}$ is the prediction error at layer $\ell$ . The update rules are strictly local:

Activity Update ( $\Delta x$ ): A neuron updates its state based on its own prediction error and back-propagated errors from the layer below.
Weight Update ( $\Delta \Theta$ ): Synaptic weights update based on the product of the local prediction error and the presynaptic activity from the layer above.
Locality: Each unit only requires its own state, local error, and signals from immediately adjacent layers.

Hardware Architecture

The implementation is a deterministic, synthesizable RTL (Register Transfer Level) design built around the following components:

Neural Core: A composable hardware unit representing a single scalar neuron. It maintains its own state ( $x$ ), prediction error ( $\epsilon$ ), and synaptic weights ( $\theta$ ).
Sequential MAC Datapath: To minimize area, each core uses a single Multiply-Accumulate (MAC) unit that iterates over presynaptic indices sequentially rather than using parallel vector units.
Finite State Machine (FSM) Scheduler: Each core executes a fixed, tick-based schedule per clock cycle:
1. PRED: Compute top-down prediction ( $\mu$ ).
2. ERR: Compute local prediction error ( $\epsilon$ ).
3. BACKSUM: Accumulate bottom-up error signals ( $b$ ).
4. BACKVEC: Emit products for the layer above.
5. WUP: Update synaptic weights.
6. STATE: Update the neuron's activity state.
Clamping Interface: A uniform per-neuron primitive allows external "clamping" of specific neurons (e.g., input or output layers). This enforces boundary conditions for supervised learning without altering the internal update schedule.
Communication: Strictly point-to-point between adjacent layers via hardwired connections. No global arbitration or shared memory is used.

Execution Model

The system operates in discrete time ticks.

Inference: Clamped inputs drive the network; weights are frozen ( $\alpha=0$ ).
Learning: Both state and weights evolve ( $\alpha>0, \gamma>0$ ).
The architecture does not assume full convergence of inference between weight updates, operating instead in an incremental regime (similar to incremental Expectation-Maximization).

3. Key Contributions

Synthesizable RTL Substrate: The first complete, open-source, synthesizable SystemVerilog implementation of a predictive coding network that executes learning dynamics directly in hardware.
Local-Only Architecture: A design where every neural core is self-contained, communicating only with adjacent layers, eliminating the need for global error propagation controllers.
Uniform Clamping Primitive: A mechanism that supports both supervised training and inference through boundary conditions, keeping the internal hardware logic identical for both modes.
Direct Hardware-Algorithm Mapping: A deterministic correspondence between the mathematical predictive coding equations and the hardware FSM stages, verified via IEEE-754 floating-point arithmetic.
Scalability: The architecture scales by instantiating more cores; the per-neuron logic and learning rules remain unchanged regardless of network size.

4. Experimental Results

The authors validated the design using Verilator simulations on the open-source repository.

Teacher-Student Regression (ReLU): A $2 \to 4 \to 3$ network successfully learned to approximate a target function. The Mean Squared Error (MSE) dropped from ~0.34 to ~0.006, exhibiting a two-phase profile (rapid initial descent followed by a slow plateau), consistent with the incremental tick regime.
Nonlinear Regression (Tanh): A $2 \to 2 \to 1$ network achieved a massive reduction in MSE (over two orders of magnitude) within just 3 epochs.
Architectural Scaling: The same RTL code was applied to networks of increasing size ( $2 \to 4 \to 3$ , $4 \to 8 \to 4$ , $8 \to 16 \to 8$ ). All architectures converged successfully without any RTL modifications, demonstrating that the local update dynamics generalize across network dimensions.
Performance Characteristics:
- Latency: The cycle count per tick scales linearly with fan-in ( $C_{tick} \approx 3N + M + 4$ ), trading throughput for reduced area.
- Residuals: Larger networks settled at slightly higher residual floors, attributed to the need for more ticks to reach inference equilibration in wider layers.

5. Significance and Implications

Hardware-Software Co-design: The work challenges the von Neumann separation of software and hardware. The learning rules are not software instructions but are instantiated as the hardware datapath itself. This aligns with the concept of "mortal computation," where the algorithm is inseparable from the physical hardware instance.
Biological Plausibility: By removing global synchronization and centralized memory, the architecture offers a more biologically plausible substrate for online learning, potentially suitable for sensorimotor tasks in noisy, streaming environments.
Future Directions: The paper highlights that while the design is stable empirically, theoretical guarantees for discrete-time, finite-precision stability are an open area. Future work may explore parallelizing the MAC units for higher throughput or moving toward analog implementations for energy efficiency.

In summary, this paper provides a concrete proof-of-concept that predictive coding can be realized as a practical, distributed hardware learning system, offering a viable alternative to backpropagation for embedded and neuromorphic applications.