High-Precision Calibration Workflow Achieves Above $99.9\%$ CZ Gate Fidelity on a Scalable Superconducting Processor

Technical Summary: High-Precision Calibration Workflow for CZ Gates on a Scalable Superconducting Processor

Problem Statement
The realization of fault-tolerant quantum computation requires physical qubits with gate error rates approaching 0.1%. While high-fidelity CZ gates have been demonstrated on isolated superconducting samples, scaling these systems introduces significant challenges. As chip size and qubit density increase, coherence times degrade due to two-level system (TLS) defects and depolarizing channels from control lines. These factors increase incoherent errors, thereby tightening the error budget available for coherent errors (those stemming from parameter deviations). In scalable processors, the tolerance for coherent errors is reduced, necessitating highly precise calibration workflows to suppress these errors and achieve gate fidelities suitable for quantum error correction (QEC).

Methodology
The authors developed a closed-loop calibration workflow designed to enhance the precision of CZ gate calibration on the "Shenglian" processor, an 84-qubit system composed of tunable transmon qubits and couplers. The workflow integrates three specific circuit techniques applied iteratively:

1. Standard Error Amplification (SEA): Used to amplify gate errors and measure accumulated conditional phases.
2. Echoed Leakage Error Amplification (ELEA): Adapted from the Phase-Averaged Leakage Error Amplification (PALEA) circuit, this technique specifically targets and amplifies population leakage to non-computational states (specifically $|02\rangle$).
3. Repurposed Context-Aware Fidelity Estimation (CAFE): Utilized to estimate fidelity while characterizing leakage, replacing traditional flux pulse amplitude scans with population measurements of specific states.

The calibration process follows a structured sequence:

• Initialization: Timing and flux distortions are compensated using infinite impulse response filters. Qubit idle frequencies are rearranged to avoid frequency collisions and optimize coherence.
• Coarse & Intermediate Calibration: The workflow scans flux pulse amplitudes ($A_1, A_2, A_c$) using SEA and ELEA. The ELEA circuit is employed to iteratively tune amplitudes until leakage is minimized and parameters converge.
• Fine Calibration: The CAFE circuit is used to precisely characterize the population of the $|02\rangle$ state, allowing for the optimization of the coupler flux amplitude ($A_c$) without direct flux scanning.
• Automated Loop: If the CZ gate fidelity falls below a threshold ($F_{th,CZ}$), the system updates the frequency configuration and repeats the calibration steps. Single-qubit phases are compensated via virtual Z gates.

Key Results

• Record Fidelity: The workflow achieved a maximum CZ gate fidelity of 99.92 ± 0.01% on a specific qubit pair. The coherent error for this gate was suppressed to 0.007%, with the remaining error dominated by incoherent processes.
• Scalability: The method was generalized to 72 parallel CZ gates across the 84-qubit processor, yielding a median fidelity of 99.25%.
• Error Breakdown: Analysis using CAFE and interleaved randomized benchmarking (IRB) revealed that for the best-performing gate, the error budget consisted of approximately 0.079% incoherent error (including leakage < 0.001%) and 0.007% coherent error.
• Stability: An 18-hour monitoring experiment (9 hours under automated calibration vs. 9 hours without) demonstrated that automated calibration significantly enhances gate stability. For qubits prone to environmental fluctuations, automated calibration reduced average error rates from ~1.5% to ~0.5%.
• Correlations: The study identified a correlation between CZ gate error rates and single-qubit gate error rates, both linked to short dephasing times ($T_2^{XY8}$).

Significance and Claims
The paper claims to establish an efficient and automated route to high-performance quantum computation using superconducting systems. By demonstrating that a closed-loop workflow utilizing ELEA and CAFE can suppress coherent errors to the 0.007% level on a large-scale (84-qubit) domestic platform, the authors show that the fidelity required for fault-tolerant QEC is achievable even in the presence of the incoherent errors inherent to scalable chips. The work highlights that automated calibration is not merely a convenience but a necessity for maintaining high performance in scalable processors where environmental drifts are significant. The results suggest that with further optimization of pulse shapes and interaction frequencies, even higher fidelities and faster gates are attainable, paving the way for practical fault-tolerant quantum computing.