⚡ electrical engineering

Silicon Phase Shifter Modeling for Electronic-Photonic Co-Simulation in a 250 nm EPIC BiCMOS Technology

This paper presents a physically oriented, HDL-implemented compact model for silicon phase shifters in 250 nm EPIC BiCMOS technology that enables accurate SPICE-compatible electro-optic co-simulation by linking device geometries and non-uniform doping profiles to electro-optical characteristics, as validated by measurements up to 80 Gb/s.

Original authors: Tobias Schwabe, Daniel Steckler, Christian Kress, Stephan Kruse, Lars Zimmermann, J. Christoph Scheytt

Published 2026-07-15

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CC BY 4.0

Original authors: Tobias Schwabe, Daniel Steckler, Christian Kress, Stephan Kruse, Lars Zimmermann, J. Christoph Scheytt

Original paper licensed under CC BY 4.0 (https://creativecommons.org/licenses/by/4.0/). ✨ This is an AI-generated explanation of the paper below. It is not written or endorsed by the authors. For technical accuracy, refer to the original paper. Read full disclaimer

Imagine you are trying to send a secret message using a beam of light instead of electricity. To make this work, you need a tiny "dimmer switch" for that light, called a phase shifter. In the world of silicon chips, this switch works by changing how many electrons and holes (tiny charged particles) are hanging out in a specific spot, which in turn changes how the light travels.

For a long time, engineers trying to design these light-switches had a problem. They were using old, "phenomenological" models—basically, they were guessing how the switch would behave based on what it looked like, rather than understanding the actual physics inside. It was like trying to fix a car engine by just guessing what the noise means, without ever opening the hood to see the gears. These old guesses didn't match the real, manufactured chips very well, making it hard to design fast, reliable systems.

The Big Discovery
The authors of this paper decided to build a brand-new, "physical" model. Instead of guessing, they wrote a set of rules (using a computer language called Verilog-A) that mimics exactly how the silicon behaves. They treated the silicon phase shifter like a special kind of diode (a one-way street for electricity) but with a twist: they realized the "traffic" of charged particles isn't always uniform.

Think of the silicon chip like a crowded dance floor. In the old models, everyone was assumed to be standing in a perfectly straight line. But the authors realized that in reality, the crowd is messy and uneven. Some areas are packed tight, while others are sparse. By accounting for this "messiness" (which they call a non-uniform doping profile), they could finally explain why the switch behaves the way it does. They even found that a specific number used in standard computer models (a SPICE parameter) actually has a real, physical meaning related to how the silicon is built, rather than just being a magic number engineers made up.

What They Ruled Out
The paper explicitly argues against the idea that you can just use simple, idealized models that assume the materials are perfectly smooth and uniform. They show that if you ignore the messy, real-world variations in how the silicon is doped (the "traffic" density), your predictions will be wrong. They also rule out the idea that you can just dump more doping everywhere to make the switch faster; while that might lower resistance, it would also increase the "capacitance" (like adding too much weight to a door hinge), which would actually slow the switch down.

The "Magic" Doping Trick
To prove their model works, they didn't just simulate things; they actually built and measured two different types of these switches. One was the standard version, and the other was a "super-charged" version.

For the super-charged version, they tried a clever trick. They added extra doping (more charged particles) to the silicon, but they carefully avoided the very center where the light travels and the switch actually happens. It's like adding more security guards to the hallway of a building but leaving the VIP room empty. This made the electrical resistance drop significantly (making the switch faster) without messing up the light or adding too much capacitance. Their model predicted this improvement, and when they measured the real chip, it worked exactly as the model said it would.

How Sure Are They?
The authors are very confident in their results, but they are careful to distinguish between what they calculated and what they measured.

They simulated the behavior of the switch using their new model and compared it to measurements taken from real chips. The match was excellent.
They used this model to simulate a complete "electro-optic transmitter" (the device that sends the data) running at speeds up to 80 Gb/s.
When they compared these simulations to measurements of the actual transmitter, the results lined up perfectly.

They didn't just suggest that this might work; they showed that their model can accurately predict the behavior of real devices, including how they handle high-speed data. They even used their model to figure out why one design was slower than the other (it was the resistance) and then fixed it by changing the doping profile, proving that their physical understanding is correct.

The Bottom Line
This paper gives engineers a new, highly accurate "instruction manual" for designing silicon light-switches. By understanding the messy, real-world physics of how charges move in silicon, they created a model that works with standard computer design tools. This means engineers can now design faster, better optical chips without having to guess and check, because their computer simulations will finally tell the truth about how the light and electricity will interact.

Technical Summary: Silicon Phase Shifter Modeling for Electronic-Photonic Co-Simulation in a 250 nm EPIC BiCMOS Technology

Problem Statement
Silicon phase shifters (PSs) based on the free-carrier plasma dispersion (FCPD) effect are critical for high-speed electro-optic transmitters, such as Mach-Zehnder modulators. While photonic electromagnetic (EM) simulation tools can model idealized devices with homogeneous materials, they often fail to align with manufactured devices due to process variations, non-uniform doping, and parasitic effects. Consequently, these tools are insufficient for accurate chip design and system development. There is a need for a physical model that links PS geometries and doping concentrations directly to electro-optic characteristics, enabling efficient co-simulation with standard electronic design automation (EDA) software.

Methodology
The authors developed a physically oriented model for a silicon PS implemented in a hardware description language (HDL), specifically Verilog-A, to ensure SPICE compatibility. The methodology involves three main components:

Electrical Modeling: The model treats the PS as a reverse-biased pn-junction diode within an optical waveguide. Unlike standard SPICE models that often treat junction parameters phenomenologically, this approach derives the space-charge-region (SCR) expansion and junction charge based on a generalized doping profile. The charge density is modeled as a function of position with a gradient coefficient $M$ , allowing the model to account for both abrupt ( $M=0$ ) and non-uniform doping profiles. This derivation links standard SPICE diode parameters (such as the gradient coefficient $M_C$ ) to physical electro-optic properties. The model also includes a voltage-dependent junction resistance $r_J$ to account for the ohmic behavior of charge carriers during charging and discharging, as well as parasitic contact capacitance $C_{con}$ .
Optical Modeling: The optical response is modeled using the FCPD effect, where changes in electron and hole concentrations alter the refractive index and attenuation. The model calculates the effective refractive index change ( $\Delta n_{eff}$ ) and attenuation change ( $\Delta \alpha$ ) by integrating the overlap between the optical mode field distribution and the spatial distribution of the charge carriers within the SCR. The optical signal is abstracted into a three-component vector (real field, imaginary field, wavelength) to enable efficient transient electro-optic co-simulation without resolving the high optical carrier frequency.
Parameter Fitting and Validation: A systematic parameter-fitting scheme was implemented using Keysight Advanced Design System (ADS). The process involved:
- Extracting contact capacitance ( $C_{con}$ ) via EM simulation.
- Fitting electrical parameters ( $I_S, n_D, R_S, C_{j0}, M_C, \phi_J, r_{J0}$ , etc.) to measured Y-parameters.
- Fitting optical parameters ( $\alpha_0, x_c, N_{dJ}$ , etc.) to measured half-wave voltage-length products ( $V_\pi L$ ) and insertion losses.
- Validating the model by simulating a complete electro-optic transmitter with data rates up to 80 Gb/s and comparing transient and S-parameter results against measurements.

Key Contributions

Novel Doping Profile Modeling: The paper introduces a method to model non-uniform pn-junctions in silicon PSs. By extending the consideration from abrupt to non-uniform profiles, the authors provide a physical interpretation for SPICE diode model parameters that were previously treated phenomenologically.
SPICE-Compatible HDL Implementation: The model is implemented in Verilog-A, allowing for seamless integration with common IC design software. This facilitates accurate and efficient co-design of electro-optic systems, linking physical device dimensions and material properties directly to circuit-level simulations.
Doping Profile Optimization: The modeling approach was used to identify bottlenecks in device performance. Specifically, the authors demonstrated that a large junction resistance limited the bandwidth. They proposed and validated an improved PS geometry with an optimized doping profile (excluding the core region from additional doping to reduce resistance without increasing capacitance or static loss), resulting in higher bandwidth.
Comprehensive Validation: The model was rigorously tested against measurements of two distinct PS types in a commercially available 250 nm EPIC BiCMOS technology. The validation included DC, AC, and Y-parameter measurements, as well as high-speed transient simulations of a complete transmitter.

Results

Model Accuracy: The derived model showed excellent agreement with measurement data. The fitted parameters successfully replicated the measured resistance and capacitance across a wide frequency range (up to 30 GHz) and various bias voltages.
Transmitter Simulation: When applied to a high-speed broadband electro-optic transmitter, the model produced transient and S-parameter simulations that were in-line with experimental measurements for data rates up to 80 Gb/s.
Bandwidth Improvement: The application of the model to analyze doping profiles led to a design modification that significantly reduced junction resistance. This improvement was consistent with the physical model and resulted in a higher bandwidth in both simulations and measurements.

Significance
The paper claims that this work enables a systematic transfer of derived results directly into a technology's process design kit (PDK). By bridging the gap between physical device characteristics and circuit-level simulation, the model allows designers to understand trade-offs and investigate bottlenecks more effectively than with conventional phenomenological models. The ability to simulate complete electro-optic transmitters with high accuracy using standard EDA tools represents a significant step toward the robust design of electronic-photonic integrated circuits (EPICs). The work demonstrates that physical modeling of non-uniform junctions is essential for accurately predicting the performance of silicon photonic devices in real-world manufacturing processes.

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