⚡ electrical engineering

Real-Time TRNG Health Monitoring with Higher-Order Proportion Testing and Rotating Pattern Detection at 500 MHz on FPGA

This paper presents a fully pipelined, 500 MHz FPGA-based TRNG health monitoring architecture that achieves real-time streaming by introducing a novel Higher-Order Adaptive Proportion Test for multi-bit dependency detection and a resource-efficient Rotating Pattern Detector, collectively forming a comprehensive three-layer defense system compliant with NIST SP 800-90B standards.

Original authors: Abbas Fadavi

Published 2026-07-01

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CC BY 4.0

Original authors: Abbas Fadavi

Original paper licensed under CC BY 4.0 (https://creativecommons.org/licenses/by/4.0/). ✨ This is an AI-generated explanation of the paper below. It is not written or endorsed by the authors. For technical accuracy, refer to the original paper. Read full disclaimer

Imagine you are running a high-stakes casino. The most important tool in your casino is a machine that generates truly random numbers (like rolling dice) to decide who wins. If this machine starts cheating, getting stuck, or being tampered with by a hacker, the whole casino is in trouble.

This paper introduces a super-fast, 24/7 security guard for that machine, built specifically for a type of computer chip called an FPGA. Here is how it works, explained simply:

The Problem: The Machine Can Get Sick

Even the best random number generators can get "sick" over time.

Aging: Old parts might start acting weird.
Environment: Heat or voltage changes can mess up the randomness.
Hacking: A bad guy might try to force the machine to output a predictable pattern (like 01010101...) so they can guess the next number.

Standard security checks (called NIST tests) are like a basic health checkup. They look for obvious problems, like if the machine is stuck on the number "1" or "0" too often. But they miss subtle tricks, like if the machine is alternating perfectly between 0 and 1 (which looks random to a basic check but is actually predictable).

The Solution: A 3-Layer Security Team

The author, Abbas Fadavi, built a new security system that runs at 500 MHz. To put that in perspective, this system checks the random numbers 500 million times every second. It doesn't stop the machine to check; it watches every single bit as it flies by, like a high-speed camera.

The system uses 8 different tests organized into three layers of defense:

Layer 1: The "Scream" Detector (Immediate Faults)

The Test: Repetition Count Test (RCT).
The Analogy: Imagine a guard watching a conveyor belt. If the same box appears 21 times in a row, the guard screams "STOP!" immediately.
What it catches: If the machine completely breaks and just outputs the same number forever, this catches it in a split second.

Layer 2: The "Statistical Detective" (Hidden Patterns)

This is where the paper introduces its two biggest innovations. Standard guards only look at single numbers. This team looks at groups of numbers.

Innovation 1: Higher-Order Proportion Testing (HO-APT)
- The Analogy: A standard guard checks if you have too many "Heads" or "Tails" in a coin toss. But what if the coins are rigged to always land "Heads, Tails, Heads, Tails"? A standard guard sees 50% Heads and 50% Tails and says, "All good!"
- The Fix: This new guard looks at pairs (Heads-Tails) and triplets (Heads-Tails-Heads). If the machine is stuck in a loop, this guard spots the repeating group and blows the whistle, even if the single numbers look fine.
Innovation 2: The Rotating Pattern Detector
- The Analogy: Imagine a security camera that can only look at one specific type of thief (e.g., a guy in a red hat). A smart thief would just wear a blue hat and walk right past.
- The Fix: This new camera is a "rotating" scanner. It quickly cycles through every possible pattern a thief could wear (65,536 different combinations for 16-bit patterns). It spends a tiny fraction of a second checking the "red hat," then the "blue hat," then the "green hat," and so on.
- The Result: Within about 67 milliseconds, it has checked every single possible pattern. No matter what weird pattern a hacker tries to inject, this scanner will eventually catch it.

Layer 3: The "Health Monitor" (Bias and Correlation)

The Tests: Bias Estimator and Correlation Estimator.
The Analogy: These are like checking if the coin is weighted (biased) or if the result of one flip influences the next (correlation). They ensure the numbers aren't leaning too heavily toward "0" or "1" and that the past doesn't predict the future.

The Results: Fast and Efficient

The author built this system on a Xilinx FPGA chip.

Speed: It runs at 500 MHz (checking 500 million bits per second).
Size: It is surprisingly small, using very little of the chip's resources (like a small security booth rather than a whole building).
Power: It uses very little electricity (about 768 milliwatts).

The Bottom Line

This paper presents a "three-layer defense" system that is much smarter than current standards.

It catches immediate crashes instantly.
It catches hidden loops by looking at groups of numbers, not just single ones.
It catches sneaky hackers by rotating through every possible pattern they could use.

The author claims this is the first system to do all of this simultaneously at such a high speed (500 MHz) without stopping the data stream, making it a robust shield for cryptographic systems that need true randomness to stay secure.

Technical Summary: Real-Time TRNG Health Monitoring with Higher-Order Proportion Testing and Rotating Pattern Detection at 500 MHz on FPGA

Problem Statement
True Random Number Generators (TRNGs) are foundational to cryptographic security, yet their statistical quality is susceptible to degradation from environmental factors (temperature, voltage), component aging, and adversarial interference. While the NIST SP 800-90B standard mandates specific health monitoring tests (Repetition Count Test and Adaptive Proportion Test), existing solutions often fail to address complex statistical weaknesses, such as inter-bit dependencies and repetitive structural patterns. Furthermore, current hardware implementations struggle to perform comprehensive, real-time streaming monitoring at high clock frequencies (e.g., 500 MHz) without significant data buffering or resource overhead.

Methodology
The paper proposes a fully pipelined, streaming health monitoring architecture implemented on an FPGA (Xilinx xcku060) operating at a 2 ns clock period (500 MHz). The system processes TRNG output bits in real-time, with all eight tests operating in parallel on a single bit stream per cycle. The architecture is organized into three defensive layers:

Immediate Fault Detection Layer:
- Repetition Count Test (RCT): A sequential counter tracks consecutive repetitions of the same bit. If the count exceeds a threshold ( $C_{RCT} = 21$ ), a failure is immediately declared. This provides the fastest response to catastrophic entropy source failures.
Statistical Distribution Layer:
- Higher-Order Adaptive Proportion Test (HO-APT): This is a novel extension of the standard NIST APT. While standard APT analyzes single-bit distributions within a sliding window ( $W=512$ $W = 512$ ), HO-APT generalizes this to $k$ $k$ -bit tuples. The implementation includes:
  - APT-1: Standard 1-bit tuple analysis (NIST compliant).
  - APT-2: 2-bit tuple analysis (sample space: 00, 01, 10, 11).
  - APT-3: 3-bit tuple analysis (sample space: 000 to 111).
    These tests detect inter-bit dependencies (e.g., alternating 010101 patterns) that appear uniform to single-bit tests but indicate structural weakness.
- Bias Estimator: Calculates the mean of output bits over a sliding window to detect deviations from a 0.5 probability.
- Correlation Estimator: Counts occurrences where consecutive bits are identical ( $b_i = b_{i+1}$ ) to detect first-order linear dependencies.
Structural Pattern Layer:
- Pattern Detector: A static module using a shift register to compare incoming bits against predefined high-risk patterns (e.g., long runs of 0s or 1s, alternating sequences).
- Rotating Pattern Detector: A novel time-multiplexed mechanism that scans the entire space of $L$ -bit patterns (specifically $L=16$ , covering $2^{16} = 65,536$ patterns). Instead of checking all patterns simultaneously, it rotates through them over time. With a window of 512 samples per pattern, full coverage of the 16-bit space is achieved in approximately 67 milliseconds.

Key Contributions
The paper identifies two primary technical contributions:

HO-APT Family: The generalization of the Adaptive Proportion Test to multi-bit tuples (APT-2 and APT-3), enabling the detection of non-linear inter-bit dependencies invisible to standard NIST tests.
Rotating Pattern Detector: A resource-efficient, time-multiplexed architecture that achieves complete structural coverage of a 16-bit pattern space within a streaming environment, addressing the limitation of static pattern detectors that can be bypassed by non-targeted anomalous patterns.

Implementation Results
The architecture was synthesized and implemented on a Xilinx xcku060 FPGA:

Timing: The design achieves timing closure at 500 MHz with a worst-case negative slack (WNS) of 0.9 ns. The critical path is located within the Rotating Pattern Detector.
Resource Utilization: The design consumes modest resources, totaling 98 Look-Up Tables (LUTs) and 340 Registers. The HO-APT modules and the Rotating Pattern Detector are the primary consumers of logic resources.
Power: Post-implementation analysis indicates a total power consumption of 768 mW (141 mW dynamic, 627 mW static) at 500 MHz.
Latency: Detection latency varies by test. RCT and the static Pattern Detector offer the lowest latency (immediate to 32 ns). The Rotating Pattern Detector has the highest latency (~67 ms) by design, trading speed for exhaustive coverage.

Significance and Claims
The authors claim that this work provides a "strict superset" of NIST SP 800-90B requirements, offering a three-layer defense strategy that covers immediate faults, statistical distribution anomalies, and structural patterns. The significance lies in the ability to perform comprehensive, real-time monitoring at 500 MHz without data buffering, a capability absent in existing streaming monitors.

The paper asserts that the proposed architecture enhances system resilience against:

Side-channel attacks causing gradual bias drift.
Periodic fault injections introducing identifiable patterns.
Gradual component degradation leading to entropy reduction.

The authors acknowledge limitations, specifically the ~67 ms coverage time for the Rotating Pattern Detector (which may be too slow for some real-time applications) and the use of fixed thresholds rather than adaptive ones. They suggest future work could involve parallelizing Rotating Pattern Detectors to reduce coverage time or implementing dynamic threshold adjustments.