⚛️ quantum physics

Strictly Local Tile-Code Architectures on Two-Dimensional Planar Lattices

This paper presents an exhaustive search for nearest-neighbor SWAP-based routing schemes to implement syndrome extraction for four tile-code families on a 2D square lattice, demonstrating that while such connectivity constraints reduce circuit-level thresholds by a factor of two to three compared to unconstrained layouts, these routed tile codes ultimately require fewer physical qubits per logical qubit than the surface code at sufficiently low physical error rates (below ~0.08%).

Original authors: Yoonjin Bae, Chae-Yeun Park

Published 2026-07-08

📖 5 min read🧠 Deep dive

CC BY 4.0

Original authors: Yoonjin Bae, Chae-Yeun Park

Original paper licensed under CC BY 4.0 (http://creativecommons.org/licenses/by/4.0/). ✨ This is an AI-generated explanation of the paper below. It is not written or endorsed by the authors. For technical accuracy, refer to the original paper. Read full disclaimer

Imagine you are trying to build a super-powerful computer that can solve problems no regular computer ever could. The problem is that the tiny building blocks of this computer (called "qubits") are incredibly fragile. A little bit of noise or heat can cause them to make mistakes, ruining the calculation.

To fix this, scientists use a trick called Quantum Error Correction. Instead of storing one piece of information on one fragile qubit, they spread it out across many qubits, like writing a secret message on a sheet of paper and then making hundreds of photocopies. If one copy gets a smudge, you can look at the others to figure out what the original letter was supposed to be.

The Problem: The "Surface Code" vs. The "Tile Code"

For a long time, the best way to do this was using a pattern called the Surface Code.

The Analogy: Imagine a checkerboard. Each square holds a piece of information. To check if a mistake happened, you look at the neighbors.
The Catch: This method is very safe, but it's wasteful. You need a huge number of physical qubits (the "photocopies") just to store a small amount of useful information (the "secret message"). It's like needing a warehouse full of paper to write a single sentence.

Recently, scientists discovered a new, more efficient pattern called Tile Codes.

The Analogy: Think of these as intricate, interlocking tiles. They pack information much more tightly. You can fit more "secret messages" into the same amount of space.
The Catch: These tiles were designed for a theoretical world where every qubit could instantly talk to any other qubit, no matter how far apart they were. But real computers (like the ones being built today) are flat, 2D grids where qubits can only talk to their immediate neighbors. In the real world, trying to use these efficient tiles is like trying to play a board game where pieces can teleport across the board, but your hands can only move them one square at a time.

The Solution: The "SWAP" Dance

The authors of this paper asked: Can we make these efficient "Tile Codes" work on a real, flat computer where qubits can only talk to their neighbors?

They developed a new routing scheme.

The Analogy: Imagine the "Tile Code" is a dance routine that requires partners to hold hands across the room. Since they can't reach, they have to shuffle. The authors designed a specific set of steps (using "SWAP" moves) where the qubits swap places with their neighbors, moving the information around until the right partners are next to each other to check for errors, and then moving back.
The Result: They created a "dance schedule" that works for four different types of these efficient tiles, ensuring the computer can check for errors without breaking the rules of the physical hardware.

The Trade-off: Speed vs. Space

When you add these "shuffling" steps to the routine, it takes longer and introduces more chances for mistakes.

The Threshold: In error correction, there's a "safety line" (called a threshold). If the hardware is too noisy (above the line), the computer fails. If it's quiet enough (below the line), the computer can fix its own mistakes.
The Finding: Because of the extra shuffling required to make the tiles work on a flat grid, the "safety line" drops. The computer needs to be about 2 to 3 times quieter than before to work.
The Twist: However, even with this stricter requirement, the Tile Codes are still more efficient in the long run.
- The Analogy: Imagine two cars. Car A (Surface Code) is a slow, heavy truck that can drive on rough roads but burns a lot of gas. Car B (Routed Tile Code) is a sleek sports car that needs a perfectly smooth road to run, but it gets incredible gas mileage.
- The Conclusion: If the road is very smooth (meaning the computer hardware is very high quality and makes very few mistakes), the sports car (Tile Code) is actually cheaper to run because it uses far fewer resources (qubits) to get the same job done. The authors found a "tipping point" (around 0.08% error rate) where the Tile Codes become the better choice.

Summary of What They Did

Invented a Search Algorithm: They wrote a computer program that exhaustively searched for the best possible "shuffling dance" (routing schedule) to make these efficient codes work on a flat grid.
Tested the Limits: They simulated these codes with different types of noise to see how quiet the hardware needs to be for them to work.
Compared Resources: They calculated exactly how many physical qubits are needed to store a certain amount of data. They found that once the hardware is good enough, these new Tile Codes require fewer physical qubits than the old Surface Code method, making them a more efficient way to build future quantum computers.

In short: They figured out how to make a highly efficient, theoretical design work on real, limited hardware. It requires the hardware to be slightly better than before, but if you have that quality, you save a massive amount of space and resources.

Technical Summary: Strictly Local Tile-Code Architectures on Two-Dimensional Planar Lattices

Problem Statement
Quantum low-density parity-check (qLDPC) codes, particularly Bivariate Bicycle (BB) codes, offer high encoding efficiency and high thresholds but rely on periodic boundary conditions and non-local qubit connectivity. These requirements are incompatible with current superconducting hardware, which is inherently two-dimensional and restricted to nearest-neighbor interactions. While previous works have proposed routing schemes or new code families to bridge this gap, many still assume multi-layer architectures, long-range connectivity, or fail to maintain strict locality on open boundaries. This paper addresses the challenge of implementing four specific families of "tile codes"—planar qLDPC codes with open boundaries and weight-6 stabilizers—using only nearest-neighbor interactions on a 2D square lattice. The core problem is determining whether these codes can maintain competitive circuit-level thresholds and resource efficiency when constrained by strict locality, specifically through the use of SWAP-based routing.

Methodology
The authors developed an exhaustive search algorithm to find optimal SWAP-based routing schemes for syndrome extraction. The methodology involves:

Code Definition: Utilizing four tile-code families defined by polynomial pairs $(f, g)$ over a Laurent polynomial ring. These codes feature bulk stabilizers of weight 6 and boundary stabilizers with reduced weight due to open boundaries.
Routing Search: A three-phase exhaustive search was conducted to find valid routing words ( $W$ $W$ ) composed of SWAP directions (L, R, U, D).
- Phase 1 (Coverage): Ensuring ancilla qubits visit all support qubits of every stabilizer.
- Phase 2 (CNOT Ordering): Verifying that for overlapping X and Z stabilizers, the number of shared qubits where the X-CNOT fires before the Z-CNOT is even (satisfying condition (b') for CSS codes).
- Phase 3 (Sub-tick Packing): Merging CNOT operations acting on disjoint qubits to minimize circuit depth.
  The search allowed for independent starting offsets for X- and Z-ancillae to optimize the schedule.
Simulation and Decoding: Syndrome-extraction circuits were simulated using the Stim simulator under two noise models: the standard circuit-based depolarizing model and the SI1000 model (tailored to superconducting transmon processors, treating CNOT as the native gate and SWAP as a native gate with 1.5 $\times$ the error rate). Logical error rates were estimated using a Belief Propagation with Ordered Statistics Decoding (BP+OSD) decoder.
Threshold and Resource Analysis: Thresholds were estimated via finite-size scaling. Resource efficiency was evaluated by calculating the number of physical qubits per logical qubit required to reach a target logical error rate ( $\epsilon_L = 10^{-9}$ ), comparing routed tile codes against the rotated surface code.

Key Contributions

Exhaustive Routing Schemes: The paper presents explicit, optimal routing schedules for four tile-code families on a strictly 2D planar lattice. These schedules ensure deterministic detector error models without requiring frame tracking, as SWAP operations cancel out over two rounds.
Threshold Estimation under Locality Constraints: The authors provide the first circuit-level threshold estimates for these tile codes when restricted to nearest-neighbor connectivity.
Resource Footprint Analysis: The study quantifies the trade-off between the reduced threshold caused by routing and the improved encoding efficiency of tile codes, demonstrating a crossover point where tile codes become more resource-efficient than surface codes.

Results

Thresholds: Under the SI1000 noise model, the thresholds for the four tile-code families without locality constraints range from 0.23% to 0.31%. When constrained to nearest-neighbor interactions with SWAP routing, the thresholds decrease to 0.11%–0.13%. This represents a reduction factor of approximately 2 to 3. The reduction is even more pronounced (factor of $\approx$ 3) under the standard depolarizing model, attributed to higher idle errors in that model.
Circuit Depth: The optimal routing schedules require 15 to 18 time steps per round (including SWAP and CNOT operations), which is optimal within the class of translation-invariant routing words.
Resource Efficiency: Despite the lower thresholds, the authors find that routed tile codes require fewer physical qubits per logical qubit than the rotated surface code at sufficiently low physical error rates.
- Under the SI1000 model, a crossover occurs at a physical error rate of $p^* \approx 0.08\%$ . Below this rate, routed tile codes become more qubit-efficient, with the advantage growing monotonically as the error rate decreases. For example, at $p = 2 \times 10^{-4}$ , the routed tile code requires only 48% of the physical qubits needed by the surface code to achieve $\epsilon_L = 10^{-9}$ .
- Under the standard depolarizing model, the routed tile code is more efficient than the surface code even at $p = 10^{-3}$ .

Significance and Claims
The paper claims that planar qLDPC codes, specifically tile codes, remain a practical candidate for fault-tolerant quantum computing even when strict locality constraints are enforced. While the necessity of SWAP routing imposes a significant penalty on the threshold (reducing it by a factor of 2–3), the high encoding efficiency of these codes compensates for this penalty at low physical error rates. The authors argue that with a proper routing scheme, tile codes can outperform the surface code in terms of physical qubit overhead, offering a viable path toward hardware-efficient quantum memories on standard 2D superconducting architectures. The work also provides a generalizable algorithm for finding routing schedules for other translation-invariant codes on planar lattices.

The Problem: The "Surface Code" vs. The "Tile Code"

The Solution: The "SWAP" Dance

The Trade-off: Speed vs. Space

Summary of What They Did

More like this